Impact of Bit Representation on Transport Capacity and Clock Accuracy in Serial Data Streams Robert Bosch GmbH

Format:

Conference/Event

Author/Creator:

Dais, Siegfried, author.

Conference Name:

SAE International Congress & Exposition (1989-02-27 : Detroit, Michigan, United States)

Language:

English

Physical Description:

1 online resource

Place of Publication:

Warrendale, PA SAE International 1989

Summary:

All networking systems proposed for the automobile are serial in nature. Most of these systems are also multimaster. A requirement common to all of these systems is the ability to separate framing information from data. This is achieved by some form of code violation for the framing bits which violates the code form for standard data bits. In the Manchester and PWM bit representations this code violation can be signalled within a single bit, NRZ requires more bits. The concept of code violation is also used for signalling errors within a message frame. Clock tolerance is dependent on the length of time over which synchronisation between the serial bit stream and receiving circuitry must be maintained. With a given physical bus line bandwidth, the transport capacity of a protocol is a function of the number of time slots needed to transfer a given number of data bytes.By careful examination of the message framing and error signalling requirements, the maximum transport capacity and the maximum allowable clock tolerances for the three most popular bit representations are derived.From this we will conclude that, for serial data streams which require framing and error signalling, an NRZ bit representation offers the higher transport capacity (including framing and bit stuffing overhead) than either Manchester or PWM bit representations and an equal tolerance to clock inaccuracy

Notes:

Vendor supplied data

Publisher Number:

890532

Access Restriction:

Restricted for use by site license