Reliability Evaluation of Hierarchical Distributed Processing System for Automotive Applications University of Detroit Mercy

Format:

Book

Conference/Event

Author/Creator:

Misbahuddin, Syed, author.

Conference Name:

International Congress & Exposition (1996-02-26 : Detroit, Michigan, United States)

Language:

English

Physical Description:

1 online resource cm

Place of Publication:

Warrendale, PA SAE International 1996

Summary:

Automotive electronics can be divided into subsystems according to their functions and physical locations Employing this concept, a hierarchical architecture of automotive electronics may be evolved In this paper a hierarchical fault tolerant distributed processing system has been introduced The system consists of a central controller (CC), m subsystems, a main bus and a shared memory module Each subsystem consists of n processors, one smart sensor group and one smart actuator group The central controller maintains the performance history of every processor in system In case of a processor's failure, the CC assigns the tasks of the faulty processor to another processor within the same subsystemReliability, which is the probability of a correctly working system for an interval of time [t-t0], has been evaluated An algorithmic approach based on the truth table method has been developed for evaluating the reliability of the proposed hierarchical architecture A comparison of the reliability calculation has been done between the proposed architecture and a system without fault tolerance capability The results show that the proposed architecture provides better reliability

Notes:

Vendor supplied data

Publisher Number:

960126

Access Restriction:

Restricted for use by site license