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JIAWG Compatible Development Boards for the i960

SAE Technical Papers (1906-current) Available online

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Format:
Conference/Event
Author/Creator:
Markie, Tracy, author.
Conference Name:
Avionics Systems (1993-05-01 : Warrendale, Pennsylvania, United States)
Language:
English
Physical Description:
1 online resource
Place of Publication:
Warrendale, PA SAE International 1993
Summary:
AbstractThe modular avionics suites in the next generation aircraft, the F-22 Advanced Tactical Fighter and the RAH-66 Comanche, have been specifically defined by JIAWG to provide the highest levels of commonality and interoperability. Both of these programs have chosen the Intel i960®MX as their processor of choice.In order to support the needs of system integrators for early hardware and software prototype development, Tronix has created the PI960MX-JXV JIAWG Execution Vehicle. The PI960MX-JXV JIAWG Execution Vehicle is the first board product to combine the i960MX Instruction Set Architecture (ISA) with the Pi Bus Backplane protocol and a MIL-STD-1553B serial data bus. In addition, the PI960MX-JXV JIAWG Execution Vehicle fully supports the Ada language tools and emulators from the leading Ada vendors.This paper describes the system architecture of the Tronix PI960MX-JXV via block diagrams and system descriptions. The paper also describes the general nature of the PI960MX-JXV's core design and its applicability to a wide variety of high-performance i960 applications, such as its being used in the design of VME based single board computers and stand alone i960 execution vehicles
Notes:
Vendor supplied data
Publisher Number:
931596
Access Restriction:
Restricted for use by site license

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