Understanding how to Mitigate Failures Induced by Atmospheric Radiation with New Transistors Layouts for Processors University Center of FEI

Format:

Conference/Event

Author/Creator:

de Souza, de Souza, author.

Contributor:

de Souza Fino, Leonardo Navarenho

Conference Name:

23rd SAE Brasil International Congress and Display (2014-10-30 : Sao Paulo, Brazil)

Language:

English

Physical Description:

1 online resource

Place of Publication:

Warrendale, PA SAE International 2014

Summary:

AbstractThis paper describes how new transistors layouts can mitigate failures Induced by atmospheric radiation, focusing on the total ionizing dose (TID) effects. By conducting an experimental comparative study of the TID effects between the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) manufactured with new layouts proposals and the standard layout (Conventional), for devices exposed to 10 keV X-ray irradiation using a Shimadzu XRD-7000 equipment, this paper suggests a new approach of layouts to have a better performance in radiation environment with low cost impact, lower power consumption, more speed and they could keep robustness and reliability

Notes:

Vendor supplied data

Publisher Number:

2014-36-0306

Access Restriction:

Restricted for use by site license