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An Architecture for Electronic Throttle Control Systems GM Powertrain

SAE Technical Papers (1906-current) Available online

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Format:
Book
Conference/Event
Author/Creator:
Costin, Mark, author.
Conference Name:
SAE 2003 World Congress & Exhibition (2003-03-03 : Detroit, Michigan, United States)
Language:
English
Physical Description:
1 online resource cm
Place of Publication:
Warrendale, PA SAE International 2003
Summary:
This paper presents an architecture for monitoring and controlling an electronic throttle control system. The architecture contains two processors, the MAIN and the MCP. The MAIN is responsible for calculating the desired throttle position and the MCP for positioning the throttle using feedback control. The two processors measure all pedal and throttle sensors redundantly and continuously monitor the state-of-health of the other processor. Depending on the fault(s) detected, actuator default position, limited throttle authority, forced idle, Bowden cable mode or engine shutdown remedial action may be taken
Notes:
Vendor supplied data
Publisher Number:
2003-01-0098
Access Restriction:
Restricted for use by site license

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