Wafer Applied Underfill Delivering Flip Chip to the Mainstream Delphi Delco Electronics Systems

Format:

Conference/Event

Author/Creator:

Chaudhuri, Arun K., author.

Conference Name:

SAE 2002 World Congress & Exhibition (2002-03-04 : Detroit, Michigan, United States)

Language:

English

Physical Description:

1 online resource

Place of Publication:

Warrendale, PA SAE International 2002

Summary:

Flip Chip packaging has found limited use for a technology that was introduced decades ago. Its application widened with the use of underfill, a necessary constituent to minimizing CTE mismatch between the component and substrate. Its reliability has been established on laminate substrates for automotive applications, an important development in light of the continuous increase in vehicle electronic content and function. Unfortunately, the assembly process incorporating underfill is cumbersome and batch-like. Also, the adhesive strength of the underfill depends critically on the cleanliness of the die after reflow, necessitating costly cleaning equipment and complex process monitoring protocols. Hence, the process of manufacturing is not SMT-friendly. A new technology, Wafer Applied Underfill (WAU), addresses the shortcomings of the traditional underfill process. In WAU, underfill is applied to bumped wafers before dicing, effectively decoupling the underfill process from the assembly process. Here tradeoffs between capillary underfill and WAU are evaluated side by side, including Known Good Die (KGD) issues, placement alignment accuracy, self-alignment capability at reflow, and assembly yield. Note that flux residue is a non-issue in this newly developed technology. Some comparative reliability data are also presented

Notes:

Vendor supplied data

Publisher Number:

2002-01-1050

Access Restriction:

Restricted for use by site license