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Design and Implementation of a Dual Processor Platform for Powertrain Systems PARADES EEIG
- Format:
- Book
- Conference/Event
- Author/Creator:
- Ferrari, Alberto, author.
- Conference Name:
- Convergence 2000 International Congress on Transportation Electronics (2000-10-16 : Detroit, Michigan, United States)
- Language:
- English
- Physical Description:
- 1 online resource cm
- Place of Publication:
- Troy, MI Convergence Transportation Electronics Association 2000
- Summary:
- This paper describes a dual-processor platform for automotive powertrain control with a high-bandwidth interconnection network among processors, memory, and I/O sub-systems, which is suitable for a System-On-Chip (SOC) implementation. The two processors share memory and I/O address space and can operate in parallel at full speed. The cost of this solution, in terms of gates and power dissipation, is not substantially higher than more classical architectures with a multi-master bus or multiple processor busses connected through gateways, but offers almost twice the performance
- Notes:
- Vendor supplied data
- Publisher Number:
- 2000-01-C050
- Access Restriction:
- Restricted for use by site license
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