Thermal Management and Control in Testing Packaged Integrated Circuit (IC) Devices Massachusetts Institute of Technology

Format:

Conference/Event

Author/Creator:

Pfahnl, Andreas C., author.

Conference Name:

34th Intersociety Energy Conversion Engineering Conference (1999-08-02 : Vancouver, Canada)

Language:

English

Physical Description:

1 online resource

Place of Publication:

Warrendale, PA SAE International 1999

Summary:

This paper describes the thermal management and design challenges of testing packaged integrated circuit (IC) devices, specifically device thermal conditioning and device-under-test (DUT) temperature control. The approach taken is to discuss the individual thermal design issues as defined by the device type (e.g. memory, microcontroller) and tester capabilities. The influence of performance-parameter specifications, such as the DUT parallelism, test time, index time, test-temperature range and test-temperature tolerance are examined. An understanding of these performance requirements and design constraints enables consideration of existing test handler thermal processing systems (e.g., gravity feed, pick and place), future test handler thermal concepts, and future high-parallelism testing needs for high-wattage memory and microprocessor devices. New thermal designs in several of these areas are described

Notes:

Vendor supplied data

Publisher Number:

1999-01-2723

Access Restriction:

Restricted for use by site license