DC Link Capacitor Size Reduction Using Phase-Shifted PWM Techniques for Pole-Phase Modulated Induction Machine Drives DTICI

Format:

Book

Conference/Event

Author/Creator:

A, Rajeshwari, author.

Conference Name:

Symposium on International Automotive Technology (2026) (2026-01-28 : Pune, India)

Language:

English

Physical Description:

1 online resource cm

Place of Publication:

Warrendale, PA SAE International 2026

Summary:

This manuscript introduces a methodology to reduce the DC link capacitor size in pole-phase modulated (PPM) induction motor drives (IMD). Typically, the DC link capacitor (DCLC) occupies around 25 to 30% of the inverter volume and 20% of the inverter material cost. Reducing the DCLC size and cost is essential to lowering the inverter size and cost. This can be accomplished by lowering the DCLC ripple current. The proposed technique suggests adapting phase-shifted triangular carrier waveforms, in all the operating modes of the PPM drive, to significantly reduce the ripple current through DCLC, successively reduces the size and cost of DCLC. Simulations are performed in MATLAB/Simulink on a 9 phase PPM drive to validate the efficacy of the strategy. Though the suggested concept is verified with a 9 phase PPM drive, which is operated in 2 modes, it can be extended to any 3n PPM drive. The results demonstrate a 60% reduction in ripple magnitude, enabling the use of smaller, more reliable, and cost-effective capacitors

Notes:

Vendor supplied data

Publisher Number:

2026-26-0170

Access Restriction:

Restricted for use by site license