Minimizing the area required for time constants in integrated circuits / by John C. Lyons.

Format:

Book

Government document

Author/Creator:

Lyons, John C., author.

Contributor:

United States. National Aeronautics and Space Administration, issuing body.

Goddard Space Flight Center

Series:

NASA technical note ; D-7110.

NASA/TN ; D-7110

Language:

English

Subjects (All):

Integrated circuits--Large scale integration--Design and construction.

Integrated circuits.

Electric capacity.

Physical Description:

1 online resource (4 pages) : illustrations.

Place of Publication:

Washington, D.C. : National Aeronautics and Space Administration, November 1972.

Summary:

When a medium- or large-scale integrated circuit is designed, efforts are usually made to avoid the use of resistor-capacitor time constant generators. The capacitor needed for this circuit usually takes up more surface area on the chip than several resistors and transistors. When the use of this network is unavoidable, the designer usually makes an effort to see that the choice of resistor and capacitor combinations is such that a minimum amount of surface area is consumed. The optimum ratio of resistance to capacitance that will result in this minimum area is equal to the ratio of resistance to capacitance which may be obtained from a unit of surface area for the particular process being used. The minimum area required is a function of the square root of the reciprocal of the products of the resistance and capacitance per unit area. This minimum occurs when the area required by the resistor is equal to the area required by the capacitor.

Notes:

"November 1972."

Description based on online resource, PDF version; title from title page (NASA, viewed on July 1, 2021).

OCLC:

23660060