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1450-2023 : IEEE Standard Test Interface Language (STIL) for Digital Test Vector Data - Redline / Institute of Electrical and Electronics Engineers (IEEE).
- Format:
- Book
- Author/Creator:
- Institute of Electrical and Electronics Engineers (IEEE), author, issuing body.
- Language:
- English
- Subjects (All):
- Computer hardware description languages.
- Digital integrated circuits--Testing--Standards.
- Digital integrated circuits.
- Physical Description:
- 1 online resource (xii, 113 pages) : illustrations
- Place of Publication:
- New York, New York : Institute of Electrical and Electronics Engineers (IEEE), 2024.
- Summary:
- The Core Test Language (CTL) is a language created for a System-on-Chip flow (or SoC flow), where a design created by one group is reused as a sub-design of a design created by another group. In an SoC flow, the smaller design embedded in the larger design is commonly called a core and the larger design is commonly called the SoC. The core is a design provided by a core provider, and the task of incorporating the sub-design into the SoC is called Core System Integration.
- Notes:
- Description based on publisher supplied metadata and other sources.
- ISBN:
- 9798855717846
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