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X86 Microprocessor, 2e.
- Format:
- Book
- Author/Creator:
- Das, Lyla B.
- Series:
- Always learning.
- Always learning
- Language:
- English
- Subjects (All):
- Intel 80x86 series microprocessors.
- Intel 80x86 series microprocessors--Programming.
- Physical Description:
- 1 online resource (889 pages)
- Edition:
- 2nd ed.
- Place of Publication:
- Noida : Pearson India, 2014.
- Summary:
- This second edition of The x86 Microprocessors has been revised to present the hardware and software aspects of the subject in a logical and concise manner. Designed for an undergraduate course on the 16-bit microprocessor and Pentium processor, the book provides a detailed analysis of the x86 family architecture while laying equal emphasis on its programming and interfacing attributes. The book also covers 8051 Microcontroller and its applications completely.
- Contents:
- Cover
- Contents
- Preface
- Acknowledgements
- About the Author
- Part - I: The x86 Microprocessors
- 0. Basics of Computer Systems
- 0.1 | A Brief History of Microprocessors
- 0.2 | Basics of Computer Architecture
- 0.3 | Computer Languages
- 0.4 | RISC and CISC Architectures
- 0.5 | Number Systems
- 0.6 | Number Format Conversions
- 0.7 | Computer Arithmetic
- 0.8 | Units of Memory Capacity
- 0.9 | The 8085 Microprocessor
- Key Points of this chapter
- Questions
- Exercises
- 1. The Architecture of 8086
- 1.1 | Internal Block Diagram of the 8086
- 1.2 | Execution Unit
- 1.3 | Bus Interface Unit
- 1.4 | Addressing Modes
- Key Points of this Chapter
- 2. Programming Concepts-I
- 2.1 | The Assembly Process
- 2.2 | Assemblers for x86
- 2.3 | Memory Models
- 2.4 | Instruction Design
- 3. Programming Concepts-II
- 3.1 | Approaches to Programming
- 3.2 | Data Transfer Instructions
- 3.3 | Branch Instructions
- 3.4 | Arithmetic Instructions
- 3.5 | Logical Instructions
- 3.6 | Shift and Rotate Instructions
- 4. Programming Concepts-III
- 4.1 | String Instructions
- 4.2 | Procedures
- 4.3 | Macros
- 4.4 | Number Format Conversions
- 4.5 | ASCII Operations
- 4.6 | Conversions for Computations and Display/Entry
- 4.7 | Signed Number Arithmetic
- 4.8 | Programming Using High Level Language Constructs
- 5. Programming Concepts-IV
- 5.1 | Input / Output Programming
- 5.2 | I/O Instructions
- 5.3 | Modular Programming
- 5.4 | Programming in C with Assembly Modules
- 6. The Hardware Structure of 8086
- 6.1 | Pin Configuration
- 6.2 | Clock.
- 6.3 | Other Processor Activities
- 6.4 | Maximum Mode
- 6.5 | Instruction Cycle
- 7. Memory and I/O Decoding
- 7.1 | Memory Device Pins
- 7.2 | Memory Address Decoding
- 7.3 | Memory Banks
- 7.4 | I/O Address Decoding
- 8. The Interrupt Structure of 8086
- 8.1 | Interrupts of 8086
- 8.2 | Dedicated Interrupt Types
- 8.3 | Software Interrupts
- 8.4 | Hardware Interrupts
- 8.5 | Priority of Interrupts
- 8.6 | Interrupt type allocation for Current PCs
- 8.7 | BIOS 10H Functions
- 8.8 | Addressing Video Memory Directly
- 8.9 | Keyboard Interfacing
- 8.10 | Hooking an Interrupt
- 9. Peripheral Interfacing-I
- 9.1 | Trainer Kit
- 9.2 | Programmable Peripheral Interface (PPI)-8255A
- 9.3 | Modes of Operation
- 9.4 | Mode 0
- 9.5 | Mode 1
- 9.6 | Mode 2 (Strobed Bidirectional Bus I/O)
- 9.7 | Centronics Printer Interface
- 9.8 | Interfacing an Analog to Digital Converter to the 8086
- 9.9 | Interfacing to a Digital to Analog Converter
- 9.10 | Interfacing Liquid Crystal Displays to the 8086
- 9.11 | Interfacing a Stepper Motor to the 8086
- 9.12 | Hex Keyboard Interfacing
- 9.13 | Interfacing Led Displays
- 10. Peripheral Interfacing-II
- 10.1 | The Programmable Interval Timer 8253/8254
- 10.2 | The Programmable Keyboard Display Interface - 8279
- 10.3 | The Programmable Interrupt Controller (PIC) 8259
- 10.4 | Cascade Mode
- 11. Peripheral Interfacing-III
- 11.1 | Serial Communication Principles
- 11.2 | Simplex, Half Duplex and Full Duplex Communication
- 11.3 | The Programmable Serial Communication Interface.
- 11.4 | Internal Reset on Power Up
- 11.5 | Direct Memory Access
- 11.6 | The DMA Controller - 8237
- 11.7 | DMA and IBM-PC
- 11.8 | PCI Based Computers
- 12. Semiconductor Memory Devices
- 12.1 | Semiconductor Memory
- 12.2 | Dynamic RAM
- 12.3 | Synchronous DRAM (SDRAM)
- 12.4 | ROM (Read Only Memory)
- 12.5 | Cache Memory
- 12.6 | Mapping Techniques
- 12.7 | Cache and the x86 Family
- 13. Multiprocessor Configurations
- 13.1 | Multiprocessor Systems
- 13.2 | Multiprocessing Using 8086
- 13.3 | The 8086 and 8089 in a Tightly Coupled Configuration
- 13.4 | Loosely Coupled Configurations and Bus Arbitration
- 13.5 | Bus Arbitration Using the 8289 Bus Arbiter IC
- 13.6 | The Arithmetic Coprocessor 8087
- 14. Advanced Processors - 80286 to Pentium
- 14.1 | The 80286 Processor
- 14.2 | The 80386
- 14.3 | Internal Architecture
- 14.4 | Programming Enhancements
- 14.5 | Hardware Features of 80386
- 14.6 | Virtual Memory
- 14.7 | Memory Management Unit
- 14.8 | Converting a Logical Address to a Physical Address
- 14.9 | Calculating the Size of the Logical Address Space
- 14.10 | Protection
- 14.11 | Multi Tasking
- 14.12 | Interrupts of 80386
- 14.13 | Privileged Instructions
- 14.14 | Enhanced Features of 80486
- 14.15 | Data Alignment
- 14.16 | The Pentium Processor
- 15. Microarchitectural Techniques of Advanced Processors
- 15.1 | Enhancing Performance - Why Pipelining?
- 15.2 | Replication - The Superscalar Concept
- 15.3 | Pentium Pro (P6) Architecture
- 15.4 | VLIW Architecture
- 16. Multicore Processors.
- 16.1 | Multicore Processing - The Concepts
- 16.2 | Major Issues in Multicore Processing
- 16.3 | The x86-based Chip Multiprocessors
- 16.4 | Conclusion
- 17. Beyond Pentium - More Advanced Processors
- 17.1 | Processors Based on the P6 Microarchitecture
- 17.2 | Features of Pentium Pro
- 17.3 | Pentium-II and Pentium-III
- 17.4 | Streaming SIMD Extensions (SSE)
- 17.5 | Pentium-IV
- 17.6 | The Continued Dominance of x86
- 17.7 | 'Core' Microarchitecture
- 17.8 | Multicore Processors
- 17.9 | Nehalem Microarchitecture
- 17.10 | Sandy Bridge and IvyBridge
- 17.11 | Fourth-Generation Core Processor Family
- 17.12 | Important Technological Features in IA Processors
- 17.13 | Nanometer Technology
- 17.14 | Difference Between Core i3, i5 and i7 Processors
- 18. Atom SoC-Intel's High-End Embedded Processor
- 18.1 | History of Intel's Embedded Processors
- 18.2 | The Bonnell Microarchitecture
- 18.3 | The Atom SoC
- 18.4 | Power Reduction Techniques in Processors
- 18.5 | Advanced Power and Configuration Interface
- 18.6 | The Silver Mont Micro Architecture
- Part - II: The 8051 Microcontroller
- 19. The 8051 Microcontroller: The Programmer's Perspective
- 19.1 | History and Family Details of 8051
- 19.2 | 8051: The Programmer's Perspective
- 19.3 | Assembly Language Programming
- 19.4 | Internal RAM
- 19.5 | The 8051 Stack
- 19.6 | Processor Status Word (PSW)
- 19.7 | Assembler Directives
- 19.8 | Storing Data in Code Memory (ROM)
- 19.9 | The Instruction Set of 8051
- 19.10 | Port Programming
- 19.11 | Subroutines (Procedures)
- 19.12 | Delay Loops
- 20. Programming the Peripherals of 8051.
- 20.1 | Pin Configuration of 8051
- 20.2 | Programming the Internal Peripherals
- 20.3 | Timers of 8051
- 20.4 | Counter Programming
- 20.5 | Interrupts of 8051
- 20.6 | Serial Communication
- 21. Interfacing External Peripherals to the 8051
- 21.1 | Interfacing ADCs and DACs to 8051
- 21.2 | Interfacing a Digital to Analog Converter (DAC) to 8051
- 21.3 | Interfacing with LCD Displays
- 21.4 | Interfacing with Light Emitting Diode Displays
- 21.5 | Hex Keyboard Interfacing
- 21.6 | Stepper Motor Interfacing
- 21.7 | DC Motor Interfacing
- Appendix A: 8086 16-bit HMOS Microprocessor 8086/8086-2/8086-1
- Appendix B: Use of DOS and Debug Commands for MASM
- Appendix C: Instruction Set and Instruction Timing of 8086
- Appendix D: List of DOS and BIOS Functions
- Appendix E: 80x87 Instruction Set (x87 - Pentium)
- Appendix F: The Instruction Set of 8051
- Appendix G: Using the Keil μ Vision 4 Tools for 8051
- Bibliography
- Index.
- Notes:
- Description based on publisher supplied metadata and other sources.
- ISBN:
- 93-325-4069-1
- OCLC:
- 1024248806
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