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Innovative Architecture for Future Generation High-Performance Processors and Systems (Cat. No.PR00650) / Institute of Electrical and Electronics Engineers.
- Format:
- Book
- Author/Creator:
- Institute of Electrical and Electronics Engineers, author, issuing body.
- Language:
- English
- Subjects (All):
- Computer architecture Congresses.
- Computer architecture.
- Physical Description:
- 1 online resource (viii, 115 pages) : illustrations
- Place of Publication:
- Los Alamitos, Calif. : IEEE Computer Society, 2000.
- Summary:
- Annotation Contains 11 papers presented at the November 1999 workshop that discussed computer architecture, compilers, and applications for high- performance systems. Some of the topics are near fine grain parallel processing using static scheduling on single ship multiprocessors, PIM architectures to support petaflops-level computation in the HTMT machine, evaluation of compiler-assisted software DSM schemes for a workstation cluster, and a heuristic approach to improve a branch and bound based program partitioning algorithm. No subject index. Annotation copyrighted by Book News, Inc., Portland, OR.
- Notes:
- Description based on publisher supplied metadata and other sources.
- Includes bibliographical references.
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