Network processor design [electronic resource] : issues and practices. Volume 1 / edited by Patrick Crowley ... [et al.].

Format:

Book

Contributor:

Crowley, Patrick, 1974-

Series:

The Morgan Kaufmann Series in Computer Architecture and Design

Language:

English

Subjects (All):

Microprocessors.

Application-specific integrated circuits.

Computer networks--Equipment and supplies.

Computer networks.

Physical Description:

1 online resource (353 p.)

Place of Publication:

Amsterdam ; Boston : Morgan Kaufmann Publishers, c2003.

Language Note:

English

Summary:

As the demand for digital communication networks has increased, so have the challenges in network component design. To meet ever-escalating performance, flexibility, and economy requirements, the networking industry has opted to build products around network processors. These new chips range from task-specific processors, such as classification and encryption engines, to more general-purpose packet or communications processors. Programmable yet application-specific, their designs are tailored to efficiently implement communications applications such as routing, protocol analysis, voice

Contents:

Front Cover; Network Processor Design Issues and Practices; Copyright Page; Contents; Preface; Chapter 1. Network Processors: An Introduction to Design Issues; 1.1 Design Challenges; 1.2 Design Techniques; 1.3 Challenges and Conclusions; PART I: DESIGN PRINCIPLES; Chapter 2. Benchmarking Network Processors; 2.1 Benchmarking Framework Overview; 2.2 Hardware-Level Benchmarks; 2.3 Microlevel Benchmarks; 2.4 Function-Level Benchmarks; 2.5 Related Work; References; Chapter 3. A Methodology and Simulator for the Study of Network Processors; 3.1 Previous Work

3.2 Component Network Simulator (ComNetSim)3.3 The Cisco Toaster2; 3.4 Implementation of ComNetSim; 3.5 Application Development; 3.6 Organization and Configuration; 3.7 Experiments and Results; 3.8 Conclusion and Future Work; References; Chapter 4. Design Space Exploration of Network Processor Architectures; 4.1 Models for Streams, Tasks, and Resources; 4.2 Analysis Using a Scheduling Network; 4.3 Multiobjective Design Space Exploration; 4.4 Case Study; Acknowledgments; References; Chapter 5. Compiler Backend Optimizations for Network Processors with Bit Packet Addressing

5.1 Bit-Level Data Flow Analysis and Bit Value Inference5.2 Code Selection; 5.3 Register Allocation Considering Register Arrays; 5.4 Dead Code Elimination; 5.5 Implementation; 5.6 Results; Acknowledgments; References; Chapter 6. A Network Processor Performance and Design Model with Benchmark Parameterization; 6.1 The Performance Model; 6.2 Workload and System Characteristics; 6.3 Design Results; 6.4 Conclusion; References; Chapter 7. A Benchmarking Methodology for Network Processors; 7.1 Related Work; 7.2 A Benchmarking Methodology; 7.3 The Benchmark Suite; 7.4 Preliminary Results

7.5 Conclusion and Future WorkReferences; Chapter 8. A Modeling Framework for Network Processor Systems; 8.1 Framework Description; 8.2 System Modeling; 8.3 IPSec VPN Decryption; 8 .4 Packet Size Distributions; 8.5 Conclusion and Future Work; Acknowledgments; References; PART II: PRACTICES; Chapter 9. An Industry Analyst's Perspective on Networ k Processors; 9.1 History of Packet Processing; 9.2 The Need for Programmability; 9.3 Network Processors; 9.4 Where Do NPs Fit in a System?; 9.5 Evaluating NP Solutions; 9.6 Trends

Chapter 10. Agere Systems-Communications Optimized PayloadPlus Network Processor Architecture10.1 Target Applications; 10.2 PayloadPlus Optimized Pipeline-Based Hardware Architecture; 10.3 3G/Media Gateway Application Example; 10.4 FPP Details; 10.5 RSP details; 10.6 Software Architecture and Overview; 10.7 Agere Performance Benefits at OC-48c; References; Chapter 11. Cisco Systems- Toaster 2; 11.1 Target Application(s); 11.2 Packet Flow Example for a Centralized System; 11.3 Packet Flow Example for a Distributed System; 11.4 Toaster2 Hardware Architecture; 11.5 External Memory Controller

11.6 Internal Column Memory

Notes:

Description based upon print version of record.

Includes bibliographical references and index.

ISBN:

1-283-52520-8

9786613837653

0-08-051249-6

OCLC:

808684017