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Asynchronous Sequential Machine Design and Analysis: A Comprehensive Development of the Design and Analysis of Clock-Independent State Machines and Systems
- Format:
- Book
- Author/Creator:
- Tinder, Richard F. (Richard Franchere), 1930-2011.
- Series:
- Synthesis lectures on digital circuits and systems (Online) ; # 18.
- Synthesis lectures on digital circuits and systems, 1932-3174 ; # 18
- Language:
- English
- Subjects (All):
- Asynchronous circuits--Mathematical models.
- Asynchronous circuits.
- Sequential circuits--Mathematical models.
- Sequential circuits.
- Sequential machine theory--Mathematical models.
- Sequential machine theory.
- Physical Description:
- 1 online resource (xv, 235 pages) : illustrations
- Other Title:
- Asynchronous Sequential Machine Design and Analysis
- Place of Publication:
- [Place of publication not identified] : Springer Nature (BSL), 2009.
- System Details:
- Mode of access: World Wide Web.
- Summary:
- Asynchronous Sequential Machine Design and Analysis provides a lucid, in-depth treatment of asynchronous state machine design and analysis presented in two parts: Part I on the background fundamentals related to asynchronous sequential logic circuits generally, and Part II on self-timed systems, high-performance asynchronous programmable sequencers, and arbiters. Part I provides a detailed review of the background fundamentals for the design and analysis of asynchronous finite state machines (FSMs). Included are the basic models, use of fully documented state diagrams, and the design and characteristics of basic memory cells and Muller C-elements. Simple FSMs using C-elements illustrate the design process. The detection and elimination of timing defects in asynchronous FSMs are covered in detail.^ This is followed by the array algebraic approach to the design of single-transition-time machines and use of CAD software for that purpose, one-hot asynchronous FSMs, and pulse mode FSMs.^Part I concludes with the analysis procedures for asynchronous state machines. Part II is concerned mainly with self-timed systems, programmable sequencers, and arbiters. It begins with a detailed treatment of externally asynchronous/internally clocked (or pausable) systems that are delay-insensitive and metastability-hardened. This is followed by defect-free cascadable asynchronous sequencers, and defect-free one-hot asynchronous programmable sequencers--their characteristics, design, and applications. Part II concludes with arbiter modules of various types, those with and without metastability protection, together with applications. Presented in the appendices are brief reviews covering mixed-logic gate symbology, Boolean algebra, and entered-variable K-map minimization.^ End-of-chapter problems and a glossary of terms, expressions, and abbreviations contribute to the reader's learning experience.^Five productivity tools are made available specifically for use with this text and briefly discussed in this front matter.
- Contents:
- Instructional support software
- I. Background fundaments for design and analysis of asynchronous state machines
- 1. Introduction and background
- 2. Simple FSM design and initialization
- 3. Detection and elimination of timing defects in asynchronous FSMs
- 4. Design of single transition time machines
- 5. Design of one-hot asynchronous FSMs
- 6. Design of pulse mode FSMs
- 7. Analysis of asynchronous FSMs
- II. Self-timed systems, programmable sequencers, and arbiters
- 8. Externally asynchronous/internally clocked systems
- 9. Cascadable asynchronous programmable sequencers (CAPS) and time-shared systems design
- 10. Asynchronous one-hot programmable sequencer systems
- 11. Arbiter modules
- App. A. Brief reviews
- A.1. Mixed-logic gate symbology and conjugate gate forms
- A.2. And/or laws and the EQV/XOR laws of boolean algebra (dual relations)
- A.3. Entered variable K-map compression and minimization
- App. B. End-of-chapter problems
- I. General background directly supporting material in this text
- II. Alternative approaches to asynchronous state machine design and analysis
- III. Important historical contributions to asynchronous circuit synthesis
- IV. Sources related to the subject of EAIC systems discussed in this text.
- Notes:
- Part of: Synthesis digital library of engineering and computer science.
- Includes bibliographical references (p. 201-202) and index.
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