Die-stacking Architecture / by Yuan Xie, Jishen Zhao.

Format:

Book

Author/Creator:

Xie, Yuan., Author.

Zhao, Jishen., Author.

Series:

Synthesis Lectures on Computer Architecture, 1935-3243

Language:

English

Subjects (All):

Electronic circuits.

Microprocessors.

Computer architecture.

Electronic Circuits and Systems.

Processor Architectures.

Local Subjects:

Electronic Circuits and Systems.

Processor Architectures.

Physical Description:

1 online resource (XIV, 113 p.)

Edition:

1st ed. 2015.

Place of Publication:

Cham : Springer International Publishing : Imprint: Springer, 2015.

System Details:

Mode of access: World Wide Web.

Summary:

The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology.

Contents:

Preface

Acknowledgments

3D Integration Technology

Benefits of 3D Integration

Fine-granularity 3D Processor Design

Coarse-granularity 3D Processor Design

3D GPU Architecture

3D Network-on-Chip

Thermal Analysis and Thermal-aware Design

Cost Analysis for 3D ICs

Conclusion

Bibliography .

Notes:

Includes bibliographical references and index.

ISBN:

9783031017476

3031017471