3D integration for VLSI systems / edited by Chuan Seng Tan, Kuan-Neng Chen, Steven J. Koester.

Format:

Book

Contributor:

Tan, Chuan Seng.

Chen, Kuan-Neng.

Koester, Steven J.

Language:

English

Subjects (All):

Integrated circuits--Very large scale integration.

Integrated circuits.

Linear integrated circuits.

Three-dimensional imaging.

Physical Description:

1 online resource (376 p.)

Edition:

1st ed.

Place of Publication:

Boca Raton, Fla. : CRC Press, 2012.

Language Note:

English

Summary:

Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usually include a stack of several thinned IC layers that are vertically bonded and interconnected by through silicon via TSV. There is a long string of benefits that one can derive from 3D IC implementation such as form factor, density multiplication, improved delay and power, enhanced bandwidth, and heterogeneous integration. This book presents contributions by key researchers in this field, covering motivations, technology platforms, applications, and other design issues.

Contents:

ch. 1. 3D integration technology : introduction and overview / Chuan Seng Tan, Kuan-Neng Chen and Steven J. Koester

ch. 2. A systems perspective on 3D integration : what is 3D? And what is 3D good for? / Phil Emma and Eren Kursun

ch. 3. Wafer bonding techniques / Bioh Kim. [et al.]

ch. 4. TSV etching / Paul Werbaneth

ch. 5. TSV filling / Arthur Keigler

ch. 6. 3D technology platform : temporary bonding and release / Mark Privett

ch. 7. 3D technology platform : wafer thinning, stress relief, and thin wafer handling / Scott Sullivan

ch. 8. Advanced die-to-wafer 3D integration platform : self-assembly technology / Takafum Fukushima. [et al.]

ch. 9. Advanced direct bond technology / Paul Enquist

ch. 10. Surface modification bonding at low temperature for three-dimensional hetero-integration / Akitsu Shigetou

ch. 11. Through silicon via implementation in CMOS image sensor product / Xavier Gagnard and Nicolas Hotellier

ch. 12. A 300-mm wafer-level three-dimensional integration scheme using tungsten through-silicon via hybrid Cu-adhesive bonding / Fei Liu

ch. 13. Power delivery in 3D IC technology with a stratum having an array of monolithic DC-DC point-of-load (PoL) converter cells / Ron Rutman and Jian Sun

ch. 14. Thermal-aware 3D IC designs / Xiaoxia Wu, Yuan Xie and Vijaykirshnan Narayanan

ch. 15. 3D IC design automation considering dynamic power and thermal integrity / Hao Yu and Xiwei Huang

ch. 16. Outlook / Ya Lan Yang.

Notes:

Bibliographic Level Mode of Issuance: Monograph

Includes bibliographical references.

ISBN:

1-04-000010-X

0-429-06746-1

981-4303-82-8

9780429067464

OCLC:

769189653