Reconfigurable Computing: Architectures, Tools and Applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013, Proceedings / edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro Diniz.

Format:

Book

Contributor:

Brisk, Philip, editor.

Coutinho, José Gabriel de Figueiredo, editor.

Diniz, Pedro, editor.

SpringerLink (Online service)

Series:

Computer Science (Springer-11645)

LNCS sublibrary. Theoretical computer science and general issues ; SL 1, 7806.

Theoretical Computer Science and General Issues ; 7806

Language:

English

Subjects (All):

Computer hardware.

Computer organization.

Algorithms.

Computer Hardware.

Computer Systems Organization and Communication Networks.

Algorithm Analysis and Problem Complexity.

Local Subjects:

Computer Hardware.

Computer Systems Organization and Communication Networks.

Algorithm Analysis and Problem Complexity.

Physical Description:

1 online resource (XVI, 238 pages) : 104 illustrations.

Edition:

First edition 2013.

Contained In:

Springer eBooks

Place of Publication:

Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2013.

System Details:

text file PDF

Summary:

This book constitutes the thoroughly refereed conference proceedings of the 9th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2013, held in Los Angeles, CA, USA, in March 2013. The 28 revised papers presented, consisting of 20 full papers and 11 poster papers were carefully selected from 41 submissions. The topics covered are applications, arithmetic, design optimization for FPGAs, architectures, place and routing.

Contents:

Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications

Hardware Acceleration of Genetic Sequence Alignment

An FPGA Acceleration for the Kd-tree Search in Photon Mapping

SEU Resilience of DES, AES in SRAM-based FPGA

An Architecture for IPv6 Lookup Using Parallel Index Generation Units

Hardware Index to Set Partition Converter

Teaching SoC Using Video Games to Improve Student Engagement

Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-based Custom Computing

Hardware Acceleration of Matrix Multiplication Over Small Prime Finite Fields

Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms

Architecture for Transparent Binary Acceleration of Loops with Memory Accesses

Parametric Optimization of Reconfigurable Designs using Machine Learning

Fast Template-based Heterogeneous MPSoC Synthesis on FPGA

Hierarchical and Multiple Switching NoC with Floorplan based Adaptability

Performance Analysis And Optimization of High Density Tree-Based 3D Multilevel FPGA.

Other Format:

Printed edition:

ISBN:

978-3-642-36812-7

9783642368127

Access Restriction:

Restricted for use by site license.