Compiler Construction : 15th International Conference, CC 2006, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2006, Vienna, Austria, March 30-31, 2006, Proceedings / edited by Alan Mycroft, Andreas Zeller.

Format:

Book

Contributor:

Mycroft, Alan, editor.

Zeller, Andreas, editor.

SpringerLink (Online service)

Series:

Computer Science (Springer-11645)

LNCS sublibrary. Theoretical computer science and general issues ; SL 1, 3923.

Theoretical Computer Science and General Issues ; 3923

Language:

English

Subjects (All):

Computer logic.

Programming languages (Electronic computers).

Operating systems (Computers).

Logic, Symbolic and mathematical.

Software engineering.

Artificial intelligence.

Logics and Meanings of Programs.

Programming Languages, Compilers, Interpreters.

Operating Systems.

Mathematical Logic and Formal Languages.

Software Engineering.

Artificial Intelligence.

Local Subjects:

Logics and Meanings of Programs.

Programming Languages, Compilers, Interpreters.

Operating Systems.

Mathematical Logic and Formal Languages.

Software Engineering.

Artificial Intelligence.

Physical Description:

1 online resource (XIII, 277 pages).

Edition:

First edition 2006.

Contained In:

Springer eBooks

Place of Publication:

Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2006.

System Details:

text file PDF

Summary:

ETAPS 2006 was the ninth instance of the European Joint Conferences on Theory and Practice of Software. ETAPS is an annual federated conference that was established in 1998 by combining a number of existing and new conferences. This year it comprised ?ve conferences (CC, ESOP, FASE, FOSSACS, TACAS), 18 satellite workshops (AC- CAT, AVIS, CMCS, COCV, DCC, EAAI, FESCA, FRCSS, GT-VMT, LDTA, MBT, QAPL, SC, SLAP, SPIN, TERMGRAPH, WITS and WRLA), two tutorials, and seven invited lectures (not including those that were speci?c to the satellite events). We - ceived over 550 submissions to the ?ve conferences this year, giving an overall acc- tance rate of 23%, with acceptance rates below 30% for each conference. Congratu- tions to all the authors who made it to the ?nal programme! I hope that most of the other authorsstill founda way of participatingin this excitingevent and I hope you will continue submitting. The events that comprise ETAPS address various aspects of the system devel- ment process, including speci?cation, design, implementation, analysis and impro- ment. The languages, methodologies and tools which support these activities are all well within its scope. Di?erent blends of theory and practice are represented, with an inclination towards theory with a practical motivation on the one hand and soundly based practice on the other. Many of the issues involved in software design apply to systems in general, including hardware systems, and the emphasis on software is not intended to be exclusive.

Contents:

Invited Talk

Using Dependent Types to Port Type Systems to Low-Level Languages

Program Analysis

Interprocedural Dataflow Analysis in the Presence of Large Libraries

Efficient Flow-Sensitive Interprocedural Data-Flow Analysis in the Presence of Pointers

Path-Based Reuse Distance Analysis

Context-Sensitive Points-to Analysis: Is It Worth It?

Dynamic Analysis

Selective Runtime Memory Disambiguation in a Dynamic Binary Translator

Accurately Choosing Execution Runs for Software Fault Localization

Tool Demonstrations

Demonstration: On-Line Visualization and Analysis of Real-Time Systems with TuningFork

Data-Flow Analysis as Model Checking Within the jABC

The CGiS Compiler-A Tool Demonstration

Optimization

Loop Transformations in the Ahead-of-Time Optimization of Java Bytecode

Hybrid Optimizations: Which Optimization Algorithm to Use?

A Fresh Look at PRE as a Maximum Flow Problem

Performance Characterization of the 64-bit x86 Architecture from Compiler Optimizations' Perspective

Code Generation

Lightweight Lexical Closures for Legitimate Execution Stack Access

Polyhedral Code Generation in the Real World

Iterative Collective Loop Fusion

Converting Intermediate Code to Assembly Code Using Declarative Machine Descriptions

Register Allocation

SARA: Combining Stack Allocation and Register Allocation

Register Allocation for Programs in SSA-Form

Enhanced Bitwidth-Aware Register Allocation.

Other Format:

Printed edition:

ISBN:

978-3-540-33051-6

9783540330516

Access Restriction:

Restricted for use by site license.