Cryptographic Hardware and Embedded Systems - CHES 2002 : 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers / edited by Burton S. Jr. Kaliski, Cetin K. Koc, Christof Paar.

Format:

Book

Contributor:

Kaliski, Burton S. Jr., editor.

Koç, Çetin K., 1957- editor.

Paar, Christof, 1963- editor.

SpringerLink (Online service)

Series:

Computer Science (Springer-11645)

Lecture notes in computer science 0302-9743 ; 2523.

Lecture Notes in Computer Science, 0302-9743 ; 2523

Language:

English

Subjects (All):

Data encryption (Computer science).

Computer networks.

Computers, Special purpose.

Operating systems (Computers).

Computer science--Mathematics.

Computer science.

Management information systems.

Cryptology.

Computer Communication Networks.

Special Purpose and Application-Based Systems.

Operating Systems.

Discrete Mathematics in Computer Science.

Management of Computing and Information Systems.

Local Subjects:

Cryptology.

Computer Communication Networks.

Special Purpose and Application-Based Systems.

Operating Systems.

Discrete Mathematics in Computer Science.

Management of Computing and Information Systems.

Physical Description:

1 online resource (XIV, 618 pages).

Edition:

First edition 2003.

Contained In:

Springer eBooks

Place of Publication:

Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2003.

System Details:

text file PDF

Summary:

ThesearetheproceedingsofCHES2002,theFourthWorkshoponCryptographic Hardware and Embedded Systems. After the ?rst two CHES Workshops held in Massachusetts, and the third held in Europe, this is the ?rst Workshop on the West Coast of the United States. There was a record number of submissions this year and in response the technical program was extended to 3 days. As is evident by the papers in these proceedings, there have been again many excellent submissions. Selecting the papers for this year's CHES was not an easy task, and we regret that we could not accept many contributions due to the limited availability of time. There were 101 submissions this year, of which 39 were selected for presentation. We continue to observe a steady increase over previous years: 42 submissions at CHES '99, 51 at CHES 2000, and 66 at CHES 2001. We interpret this as a continuing need for a workshop series that c- bines theory and practice for integrating strong security features into modern communicationsandcomputerapplications. Inadditiontothesubmittedcont- butions, Jean-Jacques Quisquater (UCL, Belgium), Sanjay Sarma (MIT, USA) and a panel of experts on hardware random number generation gave invited talks. As in the previous years, the focus of the Workshop is on all aspects of cr- tographic hardware and embedded system security. Of special interest were c- tributionsthatdescribenewmethodsfore?cienthardwareimplementationsand high-speed software for embedded systems, e. g. , smart cards, microprocessors, DSPs, et cetera CHES also continues to be an important forum for new theoretical and practical ?ndings in the important and growing ?eld of side-channel attacks.

Contents:

Invited Talk

CHES: Past, Present, and Future

Attack Strategies

Optical Fault Induction Attacks

Template Attacks

The EM Side-Channel(s)

Finite Field and Modular Arithmetic I

Enhanced Montgomery Multiplication

New Algorithm for Classical Modular Inverse

Increasing the Bitlength of a Crypto-Coprocessor

Elliptic Curve Cryptography I

Enhancing Simple Power-Analysis Attacks on Elliptic Curve Cryptosystems

Implementation of Elliptic Curve Cryptography with Built-In Counter Measures against Side Channel Attacks

Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor

Address-Bit Differential Power Analysis of Cryptographic Schemes OK-ECDH and OK-ECDSA

AES and AES Candidates

2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis

Efficient Software Implementation of AES on 32-Bit Platforms

An Optimized S-Box Circuit Architecture for Low Power AES Design

Simplified Adaptive Multiplicative Masking for AES

Multiplicative Masking and Power Analysis of AES

Tamper Resistance

Keeping Secrets in Hardware: The Microsoft XboxTM Case Study

RSA Implementation

A DPA Attack against the Modular Reduction within a CRT Implementation of RSA

Further Results and Considerations on Side Channel Attacks on RSA

Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures

Finite Field and Modular Arithmetic II

Some Security Aspects of the MIST Randomized Exponentiation Algorithm

The Montgomery Powering Ladder

DPA Countermeasures by Improving the Window Method

Efficient Subgroup Exponentiation in Quadratic and Sixth Degree Extensions

Elliptic Curve Cryptography II

On the Efficient Generation of Elliptic Curves over Prime Fields

An End-to-End Systems Approach to Elliptic Curve Cryptography

A Low-Power Design for an Elliptic Curve Digital Signature Chip

A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over

Genus Two Hyperelliptic Curve Coprocessor

Random Number Generation

True Random Number Generator Embedded in Reconfigurable Hardware

Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications

A Hardware Random Number Generator

Invited Talk

RFID Systems and Security and Privacy Implications

New Primitives

A New Class of Invertible Mappings

Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2n)

Dual-Field Arithmetic Unit for GF(p) and GF(2m)

Error Detection in Polynomial Basis Multipliers over Binary Extension Fields

Hardware Implementation of Finite Fields of Characteristic Three

Elliptic Curve Cryptography III

Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication

Randomized Signed-Scalar Multiplication of ECC to Resist Power Attacks

Fast Multi-scalar Multiplication Methods on Elliptic Curves with Precomputation Strategy Using Montgomery Trick

Hardware for Cryptanalysis

Experience Using a Low-Cost FPGA Design to Crack DES Keys

A Time-Memory Tradeo. Using Distinguished Points: New Analysis and FPGA Results.

Other Format:

Printed edition:

ISBN:

978-3-540-36400-9

9783540364009

Access Restriction:

Restricted for use by site license.