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Complete Symbolic Simulation of SystemC Models : Efficient Formal Verification of Finite Non-Terminating Programs / by Vladimir Herdt.
- Format:
- Book
- Author/Creator:
- Herdt, Vladimir, author.
- Series:
- Computer Science (Springer-11645)
- BestMasters 2625-3577
- BestMasters, 2625-3577
- Language:
- English
- Subjects (All):
- Computer hardware.
- Software engineering.
- Computer science--Mathematics.
- Computer science.
- Computer Hardware.
- Software Engineering/Programming and Operating Systems.
- Mathematics of Computing.
- Local Subjects:
- Computer Hardware.
- Software Engineering/Programming and Operating Systems.
- Mathematics of Computing.
- Physical Description:
- 1 online resource (XIX, 162 pages) : 26 illustrations.
- Edition:
- First edition 2016.
- Contained In:
- Springer eBooks
- Place of Publication:
- Wiesbaden : Springer Fachmedien Wiesbaden : Imprint: Springer Vieweg, 2016.
- System Details:
- text file PDF
- Summary:
- In his master thesis, Vladimir Herdt presents a novel approach, called complete symbolic simulation, for a more efficient verification of much larger (non-terminating) SystemC programs. The approach combines symbolic simulation with stateful model checking and allows to verify safety properties in (cyclic) finite state spaces, by exhaustive exploration of all possible inputs and process schedulings. The state explosion problem is alleviated by integrating two complementary reduction techniques. Compared to existing approaches, the complete symbolic simulation works more efficiently, and therefore can provide correctness proofs for larger systems, which is one of the most challenging tasks, due to the ever increasing complexity. Contents Verification of Systems Introduction to Formal Verification of SystemC Models Symbolic Model Checking with Partial Order Reduction Efficient Symbolic State Matching using State Subsumption Heuristic Approaches for Symbolic State Matching Evaluation of Proposed Techniques Target Groups Lecturers and Students of Computer Sciences and Electrical Engineering Hardware Designers and Verification Engineers using SystemC The Author Vladimir Herdt is working as Research Assistant in the Group of Computer Architecture at the University of Bremen, where he is pursuing his PhD degree. .
- Contents:
- Verification of Systems
- Introduction to Formal Verification of SystemC Models
- Symbolic Model Checking with Partial Order Reduction
- Efficient Symbolic State Matching using State Subsumption
- Heuristic Approaches for Symbolic State Matching
- Evaluation of Proposed Techniques.
- Other Format:
- Printed edition:
- ISBN:
- 978-3-658-12680-3
- 9783658126803
- Access Restriction:
- Restricted for use by site license.
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