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62142-2005 - IEC/IEEE iInternational standard - Verilog(R) Register Transfer Level synthesis / Institute of Electrical and Electronics Engineers.
- Format:
- Book
- Author/Creator:
- Institute of Electrical and Electronics Engineers, author, issuing body.
- Language:
- English
- Subjects (All):
- VHDL (Computer hardware description language).
- Physical Description:
- 1 online resource (116 pages)
- Other Title:
- 62142-2005 - IEC/IEEE International Standard - Verilog
- Place of Publication:
- New York, New York : IEEE, 2002.
- Summary:
- Replaces IEEE Std 1364.1-2002. To develop a standard syntax and semantics for Verilog RTL synthesis. This standard shall define the subset of IEEE 1364 (Verilog HDL) which is suitable for RTL synthesis and shall define the semantics of that subset for the synthesis domain. This standard shall be based on the current existing standard IEEE 1364.
- Notes:
- Description based on publisher supplied metadata and other sources.
- ISBN:
- 0-7381-4777-X
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