Doherty power amplifiers : from fundamentals to advanced design methods / Bumman Kim.

Format:

Book

Author/Creator:

CaliKim, author.

Contributor:

Bumman.

Language:

English

Subjects (All):

Power amplifiers.

Amplifiers, Radio frequency.

Physical Description:

1 online resource (1 volume (unpaged))

Edition:

First edition.

Place of Publication:

Cambridge, MA : Elsevier, [2018]

System Details:

text file

Summary:

Doherty Power Amplifiers: From Fundamentals to Advanced Design Methods is a great resource for both RF and microwave engineers and graduate students who want to understand and implement the technology into future base station and mobile handset systems. The book introduces the very basic operational principles of the Doherty Amplifier and its non-ideal behaviors. The different transconductance requirements for carrier and peaking amplifiers, reactive element effect, and knee voltage effect are described. In addition, several methods to correct imperfections are introduced, such as uneven input drive, gate bias adaptation, dual input drive and the offset line technique. Advanced design methods of Doherty Amplifiers are also explained, including multistage/multiway Doherty power amplifiers which can enhance the efficiency of the amplification of a highly-modulated signal. Other covered topics include signal tracking operation which increases the dynamic range, highly efficient saturated amplifiers, and broadband amplifiers, amongst other comprehensive, related topics. Specifically written on the Doherty Power Amplifier by the world’s leading expert, providing an in-depth presentation of principles and design techniques Includes detailed analysis on correcting non-ideal behaviors of Doherty Power Amplifiers Presents advanced Doherty Power Amplifier architectures

Contents:

Front Cover

Doherty Power Amplifiers: From Fundamentals to Advanced Design Methods

Copyright

Contents

Acknowledgments

Chapter One: Introduction to Doherty Power Amplifier

1.1. Historical Survey

1.2. Basic Operation Principle

1.2.1. Load Modulation Behavior

1.2.1.1. Load Impedance Modulation

1.2.1.2. Voltage, Current, and Load Impedance Profiles

1.2.1.3. Load Lines for the Modulated Loads

1.2.2. Efficiency and Gain Characteristics

1.2.2.1. Efficiency

1.2.2.2. Gain

1.3. Offset Line Technique

1.3.1. Realization of Doherty Amplifier

1.3.2. Operation of the Offset Line

1.3.2.1. Offset Line at Carrier Amplifier

1.3.2.2. Offset Line at Peaking Amplifier

1.4. Other Load Modulation Methods

1.4.1. Voltage Combined Doherty Amplifier

1.4.1.1. Series Configured Doherty Amplifier in Voltage Combining Mode

1.4.1.2. Transformer Based Power Amplifier

1.4.1.3. Transformer Based Voltage Combined Doherty Amplifier

1.4.2. Inverted Load Modulation

1.4.3. Direct Matching at the First Peak Efficiency Point

1.4.3.1. Using ROPT/2 Inverter

1.4.3.2. Using 2ROPT Inverter

Further Reading

Chapter Two: Realization of Proper Load Modulation Using a Real Transistor

2.1. Correction for Lower Current of Peaking Amplifier

2.1.1. Uneven Drive Through Coupler

2.1.1.1. Current Ratio of Peaking Amplifier Versus Carrier Amplifier

2.1.1.2. Efficiency of the Asymmetric Amplifier With Uneven Power Drive

2.1.2. Gate Bias Adaptation to Compensate the Low Current of Peaking Amplifier

2.1.2.1. Peaking Amplifier Adaptation

2.1.2.2. Adaptation of the Both Amplifiers

2.2. Knee Voltage Effect on Doherty Amplifier Operation

2.2.1. Doherty Amplifier Operation With Knee Voltage

2.2.2. Load Modulation Behavior of Doherty Amplifier With Optimized Carrier Amplifier.

2.3. Offset Line Design for Compensation of Peaking Amplifier Phase Variation

2.3.1. Phase Variation of the Peaking Amplifier

2.3.2. Load Modulation of Peaking Amplifier With the Additional Offset Lines

2.3.3. The Load Modulation of the Carrier Amplifier With the Additional Offset Lines

2.3.4. Simulation Results With Real Device

Chapter Three: Enhancement of Doherty Amplifier

3.1. Doherty Amplifier With Asymmetric Vds

3.2. Optimized Design of GaN HEMT Doherty Power Amplifier With High Gain and High Efficiency

3.2.1. Optimized Design of Carrier and Peaking Amplifiers

3.2.2. Operation of the Optimally Matched Doherty Amplifier

3.3. Optimized Peaking Amplifier Design for Doherty Amplifier

3.3.1. Optimized Design of Peaking Amplifier for Proper Doherty Operation

3.3.2. Simulation and Experimental Results

3.4. Saturated Doherty Amplifier

3.4.1. Operational Principle of the Saturated Doherty Amplifier

3.4.2. Efficiency and Linearity of the Saturated Doherty Amplifier

3.4.2.1. Efficiency of the Saturated Doherty Amplifier

3.4.2.2. Linearity of the Saturated Doherty Amplifier

3.4.3. Improved Harmonic Control Circuit for Saturated Amplifier

3.5. Average Power Tracking Operation of Basestation Doherty Amplifier

3.5.1. Derivation of Drain Bias Control Voltage and Output Power

3.5.2. Derivation for Gate Bias Control Voltage

3.5.3. Simulation Result of Reconfigured Doherty Amplifier for APT Operation

3.5.4. Implementation and Experimental Results

Chapter Four: Advanced Architecture of Doherty Amplifier

4.1. N-Way Doherty Amplifier

4.1.1. Load Modulation of N-way Doherty Amplifier

4.1.2. Efficiency of N-Way Doherty Amplifier

4.1.3. Linearity of N-way Doherty Amplifier

4.2. Three-Stage Doherty Amplifier.

4.2.1. Three-Stage I Doherty Amplifier

4.2.1.1. Fundamental Design Approach

4.2.1.2. Load Modulation, Efficiency and Output Power

4.2.1.3. Ideal Operational Behavior

4.2.2. Three-Stage II Doherty Amplifier

4.2.2.1. The Peak Efficiency Points

4.2.2.2. Load Modulation Circuit

4.2.2.3. Load Modulation Behavior and Efficiency

4.2.2.4. Three-Stage II Doherty Amplifier With Asymmetric Size Ratio

4.2.2.5. Calculated Efficiency Profile of the Three-Stage II Doherty Amplifier

4.2.2.6. Gain of the Three-Stage II Doherty Amplifier

4.2.3. Problems in Implementation of the Three-Stage Doherty Amplifiers

Chapter Five: Linear Doherty Power Amplifier for Handset Application

5.1. Introduction

5.2. Design of Linear Doherty Power Amplifier

5.2.1. Load Modulation of Doherty Amplifier Based on HBT

5.2.1.1. Gain Modulation of Carrier Amplifier

5.2.1.2. Flat Gain Operation of Doherty Amplifier Based on HBT

5.2.2. IMD3 Cancellation With Proper Harmonic Load Conditions

5.3. Compact Design for Handset Application

5.3.1. Input Power Dividing Circuit

5.3.1.1. Input Power Dividing Using a Coupler

5.3.1.2. Direct Input Dividing Without Coupler

5.3.1.3. Realization of the Input Power Dividing Circuit

5.3.2. Output Circuit Implementation

5.4. Implementation and Measurement

5.5. Doherty Power Amplifier Based on CMOS Process

5.5.1. Implementation of Linear CMOS Doherty Power Amplifier

5.5.2. Measurement Results

5.6. Average Power Tracking Operation of the Handset Doherty Amplifier

5.6.1. Adaptive Base Bias Control Circuit for Average Power Tracking

5.6.2. Implementation and Measurement

Index

Back Cover.

Notes:

Includes bibliographical references and index.

Description based on print version record.

ISBN:

9780128098752

0128098759

9780128098677

0128098678

OCLC:

1082522861