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High-speed devices and circuits with THz applications / edited by Jung Han Choi ; Krzysztof Iniewski, managing editor ; contributors, Aryan Afzalian [and ten others].

O'Reilly Online Learning: Academic/Public Library Edition Available online

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Format:
Book
Author/Creator:
Choi, Jung, author.
Contributor:
Choi, Jung Han, editor.
Iniewski, Krzysztof, 1960- editor.
Afzalian, Aryan, contributor.
Series:
Devices, circuits, and systems.
Devices, Circuits, and Systems
Language:
English
Subjects (All):
Terahertz technology.
Electronic circuits.
Very high speed integrated circuits.
Physical Description:
1 online resource (258 p.)
Edition:
1st edition
Other Title:
High speed devices and circuits with terahertz applications
Place of Publication:
Boca Raton, Florida : CRC Press, 2015.
Language Note:
English
System Details:
text file
Summary:
Presenting the cutting-edge results of new device developments and circuit implementations, High-Speed Devices and Circuits with THz Applications covers the recent advancements of nano devices for terahertz (THz) applications and the latest high-speed data rate connectivity technologies from system design to integrated circuit (IC) design, providing relevant standard activities and technical specifications. Featuring the contributions of leading experts from industry and academia, this pivotal work:Discusses THz sensing and imaging devices based on nano devices and materialsDescribes silicon o
Contents:
Front Cover; Contents; Preface; About the Editor; Contributors; Chapter 1: Terahertz Technology Based on Nano-Electronic Devices; Chapter 2: Ultimate Fully Depleted (FD) SOI Multigate MOSFETs and Multibarrier Boosted Gate Resonant Tunneling FETs for a New High-Performance Low-Power Paradigm; Chapter 3: SiGe BiCMOS Technology and Devices; Chapter 4: SiGe HBT Technology and Circuits for THz Applications; Chapter 5: Multiwavelength Sub-THz Sensor Array with Integrated Lock-In Amplifier and Signal Processing in 90 nm CMOS Technology
Chapter 6: 40/100 GbE Physical Layer Connectivity for Servers and Data CentersChapter 7: Equalization and Multilevel Modulation for Multi-Gbps Chip-to-Chip Links; Chapter 8: 25 G/40 G SerDes: Need, Architecture, and Implementation; Chapter 9: Clock and Data Recovery Circuits; Back Cover
Notes:
Description based upon print version of record.
Includes bibliographical references at the end of each chapters.
Description based on print version record.
ISBN:
9781315215686
1315215683
9781138071582
1138071587
9781351831574
1351831577
9781466590113
1466590114
OCLC:
881886713

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