2017 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP) / Tsung-Yi Ho, Shiyan Hu, Mustafa Badaroglu.

Format:

Book

Author/Creator:

Ho, Tsung-Yi, author.

Hu, Shiyan, author.

Badaroglu, Mustafa, author.

Language:

English

Subjects (All):

Multiprocessors--Congresses.

Multiprocessors.

Interconnects (Integrated circuit technology)--Congresses.

Interconnects (Integrated circuit technology).

Physical Description:

1 online resource : illustrations

Other Title:

2017 ACM/IEEE International Workshop on System Level Interconnect Prediction

Place of Publication:

Piscataway, N.J. : IEEE, 2017.

Summary:

High speed chip to chip interconnect design Design and analysis of chip package interfaces Power consumption of interconnects 3D interconnect design and prediction Emerging interconnect technologies Applications of interconnects to social, genetic, and biological systems Co optimization of interconnect technology and chip design High speed chip to chip interconnect design Design and analysis of chippackage interfaces Power consumption of interconnects 3D interconnect design and prediction Emerging interconnect technologies Applications of interconnects to social, genetic, and biological systems Co optimization of interconnect technology and chip design.

Notes:

Description based on publisher supplied metadata and other sources.

ISBN:

1-5386-1536-3