Power and performance : software analysis and optimization / Jim Kukunas.

Format:

Book

Author/Creator:

Kukunas, Jim, author.

Language:

English

Subjects (All):

Computer networks.

Enterprise application integration (Computer systems).

Management information systems.

Systems engineering.

Physical Description:

1 online resource (302 p.)

Edition:

First edition.

Place of Publication:

Amsterdam, Netherlands : Morgan Kaufmann, 2015.

Language Note:

English

System Details:

text file

Summary:

Power and Performance: Software Analysis and Optimization is a guide to solving performance problems in modern Linux systems. Power-efficient chips are no help if the software those chips run on is inefficient. Starting with the necessary architectural background as a foundation, the book demonstrates the proper usage of performance analysis tools in order to pinpoint the cause of performance problems, and includes best practices for handling common performance issues those tools identify. Provides expert perspective from a key member of Intel's optimization team on how processors and memory

Contents:

""Front Cover""; ""Power and Performance: Software Analysis and Optimization""; ""Copyright""; ""Dedication""; ""Contents""; ""Introduction""; "" Performance Apologetic""; "" Performance Is Power Efficiency""; "" Performance and Usage Patterns""; "" A Word on Premature Optimization""; "" The Roadmap""; "" Reference""; ""Part 1: Background Knowledge""; ""Chapter 1: Early Intel® Architecture""; ""1.1 Intel® 8086""; ""1.1.1 System State""; ""Address space""; ""1.1.2 Registers""; ""1.1.3 Instructions""; ""Data movement""; ""Integer arithmetic""; ""Boolean logic""; ""Flow control""; ""String""

""1.1.4 Machine Code Format""""1.2 Intel® 8087""; ""1.2.1 IEEE 754 Floating Point""; ""Formats, precision, and environment""; ""C99 support""; ""1.2.2 x87 Floating Point""; ""1.3 Intel® 80286 and 80287""; ""1.3.1 Protected and Real Mode""; ""1.3.2 Protected Mode Segmentation""; ""1.3.3 Task Control""; ""1.4 Intel® 80386 and 80387""; ""1.4.1 32-Bit Mode""; ""1.4.2 Paging""; "" References""; ""Chapter 2: Intel® Pentium® Processors""; ""2.1 Intel® Pentium®""; ""2.1.1 Superscalar""; ""2.2 Intel® Pentium® Pro""; ""2.2.1 PAE""; ""2.2.2 Î?ops ""; ""2.2.3 Out-of-Order Execution""

""4.2 Step 1: Determine the Source of the Problem""""4.3 Step 2: Determine Whether the Bottleneck Can Be Avoided""; ""4.4 Step 3: Design a Reproducible Experiment""; ""4.5 Step 4: Check Upstream""; ""4.5.1 Who""; ""4.5.2 Where and How""; ""4.5.3 What""; ""Git bisect""; ""Cleaning patches with Git""; ""Sending patches with Git""; ""4.6 Step 5: Algorithmic Improvement""; ""4.7 Step 6: Architectural Tuning""; ""4.8 Step 7: Testing""; ""4.9 Step 8: Performance Regression Testing""; "" References""; ""Chapter 5: Designing Experiments""; ""5.1 Choosing a Metric""

""5.2 Dealing with External Variables""""5.2.1 Controllable External Variables""; ""5.2.2 Uncontrollable External Variables""; ""5.3 Timing""; ""5.3.1 CPU Cycles""; ""5.3.2 Clock Time and Unix Time""; ""5.4 Phoronix Test Suite""; ""5.4.1 Running Phoronix""; ""Configuration""; ""Installing Tests""; ""Running Tests""; ""Batch Mode""; ""5.4.2 Working with Results""; ""5.4.3 Creating Custom Tests""; ""5.4.4 Phoronix Resources""; "" References""; ""Part 2: Monitors""; ""Chapter 6: Introduction to Profiling""; ""6.1 PMU""; ""6.1.1 Event Counters""; ""6.1.2 Using Event Counters""

""6.2 Top-Down Hierarchical Analysis""

Notes:

Description based upon print version of record.

Includes bibliographical references at the end of each chapters and index.

Description based on online resource; title from PDF title page (ebrary, viewed May 16, 2015).

ISBN:

9780128007266

0128007265

OCLC:

908515052