Silicon-on-insulator (soi) technology : manufacture and applications / edited by Oleg Kononchuk, Bich-Yen Nguyen.

Format:

Book

Author/Creator:

Kononchuk, O., author.

Contributor:

Kononchuk, Oleg, editor.

Nguyen, Bich-Yen, editor.

ScienceDirect (Servicio en línea)

Series:

Woodhead Publishing series in electronic and optical materials ; Number 58.

Woodhead Publishing Series in Electronic and Optical Materials ; Number 58

Language:

English

Subjects (All):

Semiconductors--Congresses.

Semiconductors.

Silicon--Congresses.

Silicon.

Silicon-on-insulator technology--Congresses.

Silicon-on-insulator technology.

Physical Description:

1 online resource (503 p.)

Edition:

1st edition

Place of Publication:

Cambridge, England ; Waltham, Massachusetts : Woodhead Publishing, 2014.

Language Note:

English

System Details:

text file

Summary:

<i>Silicon-On-Insulator (SOI) Technology: Manufacture and Applications</i> covers SOI transistors and circuits, manufacture, and reliability. The book also looks at applications such as memory, power devices, and photonics. The book is divided into two parts; part one covers SOI materials and manufacture, while part two covers SOI devices and applications. The book begins with chapters that introduce techniques for manufacturing SOI wafer technology, the electrical properties of advanced SOI materials, and modeling short-channel SOI semiconductor transistors. Both partially depleted and ful

Contents:

Cover ; Silicon-on-insulator (SOI) Technology : Manufacture and Applications ; Copyright ; Contents; Contributor contact details; Woodhead Publishing Series in Electronic and Optical Materials; Introduction; Part I: Silicon-on-insulator (SOI) materials and manufacture; 1: Materials and manufacturing techniques for silicon-on-insulator (SOI) wafer technology; 1.1 Introduction; 1.2 SOI wafer fabrication technologies: an overview; 1.3 SOI volume-fabrication process; 1.4 SOI wafer structures and characterization; 1.5 Direct wafer bonding: wet surface cleaning techniques

2.3 Characterization of SOI wafers using the pseudo-metal oxide semiconductor field effect transister (MOSFET) technique2.4 Developments in the pseudo-MOSFET technique; 2.5 Conventional methods for the characterization of FD MOSFETs; 2.6 Advanced methods for the characterization of FD MOSFETs; 2.7 Characterization of ultrathin SOI MOSFETs; 2.8 Characterization of multiple-gate MOSFETs; 2.9 Characterization of nanowire FETs; 2.10 Conclusions; 2.11 Acknowledgments; 2.12 References

3: Modeling the performance of short-channel fully depleted silicon-on-insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs) 3.1 Introduction; 3.2 The development of SOI MOSFET modeling; 3.3 A 1-D compact capacitive model for a SOI MOSFET; 3.4 A 2-D analytical model for a SOI MOSFET; 3.5 Modeling of dual gate and other types of SOI MOSFET architecture; 3.6 References; 4: Partially depleted (PD) silicon-on-insulator (SOI) technology: circuit solutions; 4.1 Introduction; 4.2 PDSOI technology and devices; 4.3 Circuit solutions: digital circuits

4.4 Circuit solutions: static random access memory (SRAM) circuits4.5 SRAM margining: PDSOI example; 4.6 Future trends; 4.7 References; 5: Planar fully depleted (FD) silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) technology; 5.1 Introduction; 5.2 Planar FDSOI technology; 5.3 VT adjustment on FDSOI: channel doping, gate stack engineering and ground planes ; 5.4 Substrate requirements for FDSOI CMOS devices: BOX and channel thicknesses; 5.5 Strain options on FDSOI; 5.6 Performance without and with back bias; 5.7 Conclusion; 5.8 Acknowledgements; 5.9 References

6: Silicon-on-insulator (SOI) junctionless transistors

Notes:

Includes index.

Includes bibliographical references and index.

Description based on print version record.

ISBN:

9780857099259

0857099256

OCLC:

881887848