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Design and development of multi-lane smart electromechanical actuators / Fawaz Yahya Annaz.

Knovel Electronics & Semiconductors Academic Available online

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Format:
Book
Author/Creator:
Annaz, Fawaz Yahya, author.
Series:
IET control engineering series ; 93.
IET Control Engineering Series ; 93
Language:
English
Subjects (All):
Actuators.
Control theory.
Physical Description:
1 online resource (122 p.)
Edition:
1st ed.
Place of Publication:
Hertfordshire, England : The Institution of Engineering and Technology, 2013.
Language Note:
English
System Details:
Mode of access: World Wide Web.
Summary:
Design and Development of Multi-Lane Smart Electromechanical Actuators presents the design of electromechanical actuators in two types of architectures, namely, Torque Summed Architecture (TSA) and Velocity Summed Architecture, (VSA). It examines them in: * Hardware redundancy, where the architecture is made up of 3 or 4 lanes. * Digital Math Model redundancy, where a more compact two lanes architectures will be presented.
Contents:
Contents; 1. Introduction; 2. Relevant developments; 2.1 The all-electric aircraft concept; 2.2 Electromechanical actuator development; 2.3 Electromagnetically summed actuators; 2.4 Electrohydraulic actuators; 2.5 The book approach; 3. Modelling the brushless dc motor; 3.1 The lumped mathematical model; 3.2 The three-phase mathematical model; 4. Control design; 4.1 The lumped model; 4.2 Initial design; 4.3 Design modification; 4.4 Advanced design stage; 4.5 The loads model; 4.6 Gearbox ratio selection; 5. Architecture consolidation; 5.1 Architecture consolidation
5.2 Fault detection and fault isolation (FDI) system5.3 Architecture consolidation; 5.4 Mismatch between lanes; 5.5 A simulation-graphical Monte Carlo thresholds setting method; 6. Hardware cross monitoring; 6.1 Peak lane disparities; 6.2 Scheduled threshold setting, STS - failure transients and aircraft response; 6.3 Unscheduled threshold setting (UTS) - a simulation graphical Monte Carlo (SGMC) approach; 7. Digital cross monitoring; 7.1 Hardware cross monitoring; 7.2 Digital cross monitoring (DCM); Appendix 1: Hardware cross monitoring; Appendix 2: Digital cross monitoring; References
Index
Notes:
Description based upon print version of record.
Includes bibliographical references and index.
Description based on online resource; title from PDF title page (ebrary, viewed July 23, 2014).
ISBN:
1-68015-341-2
1-84919-656-7

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