Embedded hardware / Jack Ganssle ... [et al.].

Format:

Book

Contributor:

Ganssle, Jack G.

Series:

Newnes know it all series.

Newnes know it all series

Language:

English

Subjects (All):

Embedded computer systems.

Physical Description:

1 online resource (537 p.)

Edition:

1st ed.

Place of Publication:

Amsterdam ; Boston : Elsevier/Newnes, c2008.

Language Note:

English

Summary:

The Newnes Know It All Series takes the best of what our authors have written to create hard-working desk references that will be an engineer's first port of call for key information, design techniques and rules of thumb. Guaranteed not to gather dust on a shelf!Circuit design using microcontrollers is both a science and an art. This book covers it all. It details all of the essential theory and facts to help an engineer design a robust embedded system. Processors, memory, and the hot topic of interconnects (I/O) are completely covered. Our authors bring a wealth of experience and idea

Contents:

Front Cover; Embedded Hardware; Copyright Page; Contents; About the Authors; Chapter 1 Embedded Hardware Basics; 1.1 Lesson One on Hardware: Reading Schematics; 1.2 The Embedded Board and the von Neumann Model; 1.3 Powering the Hardware; 1.3.1 A Quick Comment on Analog Vs. Digital Signals; 1.4 Basic Electronics; 1.4.1 DC Circuits; 1.4.2 AC Circuits; 1.4.3 Active Devices; 1.5 Putting It Together: A Power Supply; 1.5.1 The Scope; 1.5.2 Controls; 1.5.3 Probes; Endnotes; Chapter 2 Logic Circuits; 2.1 Coding; 2.1.1 BCD; 2.2 Combinatorial Logic; 2.2.1 NOT Gate; 2.2.2 AND and NAND Gates

2.2.3 OR and NOR Gates2.2.4 XOR; 2.2.5 Circuits; 2.2.6 Tristate Devices; 2.3 Sequential Logic; 2.3.1 Logic Wrap-Up; 2.4 Putting It All Together: The Integrated Circuit; Endnotes; Chapter 3 Embedded Processors; 3.1 Introduction; 3.2 ISA Architecture Models; 3.2.1 Operations; 3.2.2 Operands; 3.2.3 Storage; 3.2.4 Addressing Modes; 3.2.5 Interrupts and Exception Handling; 3.2.6 Application-Specific ISA Models; 3.2.7 General-Purpose ISA Models; 3.2.8 Instruction-Level Parallelism ISA Models; 3.3 Internal Processor Design; 3.3.1 Central Processing Unit (CPU); 3.3.2 On-Chip Memory

3.3.3 Processor Input/Output (I/O)3.3.4 Processor Buses; 3.4 Processor Performance; 3.4.1 Benchmarks; Endnotes; Chapter 4 Embedded Board Buses and I/O; 4.1 Board I/O; 4.2 Managing Data: Serial vs. Parallel I/O; 4.2.1 Serial I/O Example 1: Networking and Communications: RS-232; 4.2.2 Example: Motorola/Freescale MPC823 FADS Board RS-232 System Model; 4.2.3 Serial I/O Example 2: Networking and Communications: IEEE 802.11 Wireless LAN; 4.2.4 Parallel I/O; 4.2.5 Parallel I/O Example 3: ""Parallel"" Output and Graphics I/O

4.2.6 Parallel and Serial I/O Example 4: Networking and Communications-Ethernet4.2.7 Example 1: Motorola/Freescale MPC823 FADS Board Ethernet System Model; 4.2.8 Example 2: Net Silicon ARM7 (6127001) Development Board Ethernet System Model; 4.2.9 Example 3: Adastra Neptune x86 Board Ethernet System Model; 4.3 Interfacing the I/O Components; 4.3.1 Interfacing the I/O Device with the Embedded Board; 4.3.2 Interfacing an I/O Controller and the Master CPU; 4.4 I/O and Performance; 4.5 Board Buses; 4.6 Bus Arbitration and Timing; 4.6.1 Nonexpandable Bus: I[sup(2)]C Bus Example

4.6.2 PCI (Peripheral Component Interconnect) Bus Example: Expandable4.7 Integrating the Bus with Other Board Components; 4.8 Bus Performance; Chapter 5 Memory Systems; 5.1 Introduction; 5.2 Memory Spaces; 5.2.1 L1 Instruction Memory; 5.2.2 Using L1 Instruction Memory for Data Placement; 5.2.3 L1 Data Memory; 5.3 Cache Overview; 5.3.1 What Is Cache?; 5.3.2 Direct-Mapped Cache; 5.3.3 Fully Associative Cache; 5.3.4 N-Way Set-Associative Cache; 5.3.5 More Cache Details; 5.3.6 Write-Through and Write-Back Data Cache; 5.4 External Memory; 5.4.1 Synchronous Memory; 5.4.2 Asynchronous Memory

5.4.3 Nonvolatile Memories

Notes:

Description based upon print version of record.

Includes bibliographical references and index.

ISBN:

1-281-77201-1

9786611772017

0-08-056074-1

OCLC:

635292558