2011 IEEE 17th International Symposium on High Performance Computer Architecture

Format:

Book

Author/Creator:

International Symposium on High-Performance Computer Architecture, author.

Contributor:

IEEE Staff, Contributor.

Language:

English

Subjects (All):

Computer architecture--Congresses.

Computer architecture.

Physical Description:

1 online resource (vii, 550 pages) : illustrations

Place of Publication:

[Place of publication not identified] IEEE 2011

Language Note:

English

Summary:

Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suffer from hard-to-reproduce hiesenbugs. We introduce Calvin, a shared memory model capable of executing in a conventional nondeterministic mode when performance is paramount and a deterministic mode when execution repeatability is important. Unlike prior hardware proposals for deterministic execution, Calvin exploits the flexibility of a memory consistency model weaker than sequential consistency. Specifically, Calvin logically orders memory operations into strata that are compatible with the Total Store Order (TSO). Calvin is also designed with the needs of future power-aware processors in mind, and does not require any speculation support. We develop a Calvin-MIST implementation that uses an unordered coalescing write cache, multiple-write coherence protocol, and delayed (timebomb) invalidations while maintaining TSO compatibility. Results show that Calvin-MIST can execute workloads in conventional mode at speeds comparable to a conventional system (providing compatibility) or execute deterministically for a modest average slowdown of less than 20% (when determinism is valued).

Notes:

Bibliographic Level Mode of Issuance: Monograph

ISBN:

9781424494354

1424494354