2010 International Symposium on Electronic System Design

Format:

Book

Author/Creator:

International Symposium on Electronic System Design, author.

Contributor:

IEEE Staff, Contributor.

Language:

English

Subjects (All):

Electronic systems--Congresses.

Electronic systems.

Physical Description:

1 online resource

Place of Publication:

[Place of publication not identified] I E E E 2010

Language Note:

English

Summary:

Performance and power consumption are very important aspects of embedded systems design. Several studies have shown that cache memory consumes as much as 50\% of the total power in such systems. Thus, the architecture of the cache governs both performance and power usage of the embedded system. In this paper a new Reconfigurable Embedded Data (RED) cache is proposed especially targeted towards embedded systems. This paper further explores the issues and considerations involved in designing such a reconfigurable cache. The novelty of the RED cache architecture lies in the fact that it can be configured as direct-mapped, two-way, or four-way set associative using a mode selector function. Thus, one cache design can be used for different applications. The module has been designed, simulated and synthesized in Xilinx ISE 9.1i and ModelSim SE 6.3e using the Verilog hardware description language.

Notes:

Bibliographic Level Mode of Issuance: Monograph

ISBN:

9780769542942

0769542948