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2007 European Conference on Circuit Theory and Design

IEEE Xplore (IEEE/IET Electronic Library - IEL) Available online

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Format:
Book
Author/Creator:
Institute of Electrical and Electronics Engineers, author, issuing body.
Language:
English
Subjects (All):
Electric circuits--Congresses.
Electric circuits.
Electric filters--Congresses.
Electric filters.
Electric networks--Congresses.
Electric networks.
Physical Description:
1 online resource
Place of Publication:
[Place of publication not identified] I E E E 2007
Language Note:
English
Summary:
3D discrete wavelet transform (DWT) is a compute-intensive task that is usually implemented on specific architectures in many real-time medical imaging systems. In this paper, a novel area-efficient high-throughput 3D DWT architecture is proposed based on distributed arithmetic. A tap-merging technique is used to reduce the size of DA lookup tables. The proposed architectures were designed in VHDL and mapped to a Xilinx Virtex-E FPGA. The synthesis results show the proposed architecture has a low area cost and can run up to 85 MHz, which can perform a five-level 3D wavelet analysis for seven 128 times 128 times 128 volume images per second.
Notes:
Bibliographic Level Mode of Issuance: Monograph
ISBN:
9781509086498
1509086498
9781424413423
1424413427

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