2001 IEEE International Symposium on Performance Analysis of Systems and Software : ISPASS, November 4-6, 2001, Tucson, Arizona / Institute of Electrical and Electronics Engineers.

Format:

Book

Author/Creator:

Institute of Electrical and Electronics Engineers, author, issuing body.

Language:

English

Subjects (All):

Computer systems--Evaluation--Congresses.

Computer systems.

Computer systems--Reliability--Congresses.

Physical Description:

1 online resource (x, 185 pages) : illustrations

Other Title:

Performance Analysis of Systems and Software, 2001. ISPASS. 2001 IEEE International Symposium on

Place of Publication:

Piscataway, New Jersey : IEEE, 2001.

Contents:

2001 IEEE International Symposium on Performance Analysis of Systems and Software [front matter]

MASE: a novel infrastructure for detailed microarchitectural modeling

Early design phase power/performance modeling through statistical simulation

Performance analysis using pipeline visualization

Implementation and evaluation of a best-effort scheduling algorithm in an embedded real-time system

An evaluation of the POSIX trace standard implemented in RT-linux

Cycle accurate thread timer for linux environmenthang

About the sensitivity of the HLRC-DU protocol on diff and page sizes

Geist: a generator for e-commerce & internet server traffic

Performance characterization experience of multi-tier e-business systems using queuing operational analysis

Understanding control flow transfer and its predictability in java processing

The effects of context switching on branch predictor performance

Estimating internal memory fragmentation for java programs under the binary buddy policy

An evaluation of search tree techniques in the presence of caches

Automatic memory hierarchy characterization

Using program and user information to improve file prediction performance

Efficient profile-based evaluation of randomising set index functions for cache memories

Workload characterization of multithreaded java servers

Behavior and performance of interactive multi-player game servers

Parallel simulation of multiprocessor execution: implementation and results for simplescalar

Locality-aware predictive scheduling of network processors

Statistical usage testing applied to mobile network verification

Balancing thoughput and fairness in SMT processors

An empirical study of the scalability aspects of instruction distribution algorithms for clustered processors

How to compare the performance of two SMT microarchitectures

Author index.

Notes:

Description based on publisher supplied metadata and other sources.