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Hardware and Software: Verification and Testing : 10th International Haifa Verification Conference, HVC 2014, Haifa, Israel, November 18-20, 2014, Proceedings / edited by Eran Yahav.
SpringerLink Books Lecture Notes In Computer Science (LNCS) (1997-2024) Available online
View online- Format:
- Book
- Series:
- Computer Science (Springer-11645)
- LNCS sublibrary. Programming and software engineering ; SL 2, 8855.
- Programming and Software Engineering ; 8855
- Language:
- English
- Subjects (All):
- Software engineering.
- Computer logic.
- Programming languages (Electronic computers).
- Artificial intelligence.
- Logic, Symbolic and mathematical.
- Computer networks.
- Software Engineering.
- Logics and Meanings of Programs.
- Programming Languages, Compilers, Interpreters.
- Artificial Intelligence.
- Mathematical Logic and Formal Languages.
- Computer Communication Networks.
- Local Subjects:
- Software Engineering.
- Logics and Meanings of Programs.
- Programming Languages, Compilers, Interpreters.
- Artificial Intelligence.
- Mathematical Logic and Formal Languages.
- Computer Communication Networks.
- Physical Description:
- 1 online resource (XVI, 302 pages) : 78 illustrations.
- Edition:
- First edition 2014.
- Contained In:
- Springer eBooks
- Place of Publication:
- Cham : Springer International Publishing : Imprint: Springer, 2014.
- System Details:
- text file PDF
- Summary:
- This book constitutes the refereed proceedings of the 10th International Haifa Verification Conference, HVC 2014, held in Haifa, Israel, in November 2014. The 17 revised full papers and 4 short papers presented were carefully reviewed and selected from 43 submissions. The papers cover a wide range of topics in the sub-fields of testing and verification applicable to software, hardware, and complex hybrid systems.
- Contents:
- Using Coarse-Grained Abstractions to Verify Linearizability on TSO Architectures
- Enhancing Scenario Quality Using Quasi-Events
- Combined Bounded and Symbolic Model Checking for Incomplete Timed Systems
- DynaMate: Dynamically Inferring Loop Invariants for Automatic Full Functional Verification
- Generating Modulo-2 Linear Invariants for Hardware Model Checking
- Suraq - A Controller Synthesis Tool Using Uninterpreted Functions
- Synthesizing Finite-State Protocols from Scenarios and Requirements
- Automatic Error Localization for Software Using Deductive Verification
- Generating JML Specifications from Alloy Expressions
- Assume-Guarantee Abstraction Refinement Meets Hybrid Systems
- Handling TSO in Mechanized Linearizability Proofs
- Partial Quantifier Elimination
- Formal Verification of 800 Genetically Constructed Automata Programs: A Case Study
- A Framework to Synergize Partial Order Reduction with State Interpolation
- Reduction of Resolution Refutations and Interpolants via Subsumption
- Read, Write and Copy Dependencies for Symbolic Model Checking
- Efficient Combinatorial Test Generation Based on Multivalued Decision Diagrams
- Formal Verification of Secure User Mode Device Execution with DMA
- Supervisory Control of Discrete-Event Systems via IC3
- Partial-Order Reduction for Multi-core LTL Model Checking
- A Comparative Study of Incremental Constraint Solving Approaches in Symbolic Execution.
- Other Format:
- Printed edition:
- ISBN:
- 978-3-319-13338-6
- 9783319133386
- Access Restriction:
- Restricted for use by site license.
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