2 options
Applying reconfigurable computing to reconfigurable networks.
- Format:
- Book
- Thesis/Dissertation
- Author/Creator:
- Hadzic, Ilija.
- Language:
- English
- Subjects (All):
- Computer science.
- Electrical engineering.
- 0544.
- 0984.
- Local Subjects:
- 0544.
- 0984.
- Physical Description:
- 140 pages
- Contained In:
- Dissertation Abstracts International 60-12B.
- System Details:
- Mode of access: World Wide Web.
- text file
- Summary:
- Considerable research has been recently directed towards building flexible and reconfigurable network infrastructures, which promise to provide better functionality and allow faster evolution in services. Two classes of reconfigurable networks have been investigated: adaptive protocols and programmable (active) networks. An adaptive protocol can modify itself and dynamically optimize its structure in the face of changing network conditions. A second technology, programmable (or active) networks have been proposed as a way of accelerating the deployment and support of new network services. Several software-only prototypes of each technology (adaptive protocols and active networks) have been built. Performance limitations and a tacit assumption that protocol flexibility requires software has generated a considerable amount of skepticism towards these approaches. We make three major contributions in this thesis. First, we demonstrate how results in the field of Reconfigurable Computing can be applied in constructing a reconfigurable network protocol, improving the performance by delegating "bit-intensive" functions to hardware. Second, we extract the safety and security issues discovered in prototyping and generalize them to any architecture using programmable logic. Third, this thesis completes the research in Protocol Boosters, a project in the field of adaptive protocols, which was considered incomplete prior to this work. The methodology we use is evaluation of a proof-of-concept through design and implementation. Our experimental platform, the Programmable Protocol Processing Pipeline (P4) is optimized for network processing and composes a set of field-programmable logic arrays (FPGA) into a processing engine achieving the processing performance of special purpose hardware with the software-like flexibility. Using the P4 and one of the proposed frameworks for building adaptive and programmable protocols, we demonstrate that reconfigurable hardware can be used for building reconfigurable networks. This demonstrates that on-the-fly hardware programmability can be applied in many settings such as line cards, switches and routers.
- Notes:
- Source: Dissertation Abstracts International, Volume: 60-12, Section: B, page: 6271.
- Supervisor: Jonathan M. Smith.
- Thesis (Ph.D.)--University of Pennsylvania, 1999.
- Local Notes:
- School code: 0175.
- ISBN:
- 9780599558946
- Access Restriction:
- Restricted for use by site license.
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