Proceedings. eighth IEEE European Test Workshop : 25-28 May, 2003, Maastricht, the Netherlands / sponsored by IEEE Computer Society Test Technology Technical Council (TTTC) ; organized by Philips Research.

Format:

Book

Conference/Event

Contributor:

IEEE Xplore (Online service)

IEEE Computer Society. Technical Council on Test Technology.

Philips Research.

Conference Name:

IEEE European Test Workshop (8th : 2003 : Maastricht, Netherlands)

Language:

English

Subjects (All):

Integrated circuits--Testing--Congresses.

Integrated circuits.

Genre:

Conference papers and proceedings.

Physical Description:

vii, 161 pages : illustrations, portraits

Other Title:

ETW 2003

Test Workshop, IEEE European, 2003

European Test Workshop, 2003, proceedings, the Eighth IEEE.

Place of Publication:

Los Alamitos, Calif. : IEEE Computer Society Press, 2003.

System Details:

Mode of access: World Wide Web.

text file

Contents:

DFT & BIST

TPI for Improving PR Fault Coverage of Boolean and Three-State Circuits / M.J. Geuzebroek, A.J. van de Goor 3

On the Selection of Efficient Arithmetic Additive Test Pattern Generators / S. Manich, L. Garcia, L. Balado, E. Lupon, J. Rius, R. Rodriguez, J. Figueras 9

Parity-Based Output Compaction for Core-Based SOCs / O. Sinanoglu, A. Orailoglu 15

Memory Test

Defect-Oriented Dynamic Fault Models for Embedded-SRAMs / S. Borri, M. Hage-Hassan, P. Girard, S. Pravossoudovitch, A. Virazel 23

Importance of Dynamic Faults for New SRAM Technologies / S. Hamdioui, R. Wadsworth, J.D. Reyes, A.J. van de Goor 29

Yield Analysis for Repairable Embedded Memories / A. Sehgal, A. Dubey, E.J. Marinissen, C. Wouters, H. Vranken, K. Chakrabarty 35

Asynchronous Test

Scan Test Strategy for Asynchronous-Synchronous Interfaces / O. Petre, H.G. Kerkhoff 43

SoC Testing

An Efficient Approach to SoC Wrapper Design, TAM Configuration and Test Scheduling / J. Pouget, E. Larsson, Z. Peng, M.-L. Flottes, B. Rouzeyre 51

Control-Aware Test Architecture Design for Modular SOC Testing / S.K. Goel, E.J. Marinissen 57

Issues in Test Application

A Practical Evaluation of I[subscript DDQ] Test Strategies for Deep Submicron Production Test Application: Experiences and Targets from the Field / A. Fudoli, A. Ascagni, D. Appello, H. Manhaeve 65

Automating the Device Interface Board Modeling for Virtual Test / M. Rona, G. Krampl, F. Raczkowski 71

Defect-Oriented Test

Signal Integrity Loss in Bus Lines Due to Open Shielding Defects / V. Avendano, V. Champac, J. Figueras 79

Process-Variability Aware Delay Fault Testing of [Delta]V[subscript T] and Weak-Open Defects / D. Arumi-Delgado, R. Rodriguez-Montanes, J. Pineda de Gyvez, G. Gronthoud 85

Modeling Feedback Bridging Faults with Non-Zero Resistance / I. Polian, P. Engelke, M. Renovell, B. Becker 91

ATPG

Automating Test Program Generation in STIL - Expectations and Experiences Using IEEE 1450 / H. Lang, B. Pande, H. Ahrens 99

Automatic Worst Case Pattern Generation Using Neural Networks & Genetic Algorithm for Estimation of Switching Noise on Power Supply Lines in CMOS Circuits / E. Liau, D. Schmitt-Landsiedel 105

Functional Validation

Code Generation for Functional Validation of Pipelined Microprocessors / F. Corno, G. Squillero, M. Sonza Reorda 113

Scan and Core Testing

Enhanced P1500 Compliant Wrapper Suitable for Delay Fault Testing of Embedded Cores / H.J. Vermaak, H.G. Kerkhoff 121

RF, EME, and Probing

RF ATE Equipment Benefit from Advanced Network Analyzer Technology / M. Seth 129

Characterization of the EME of Integrated Circuits with the Help of the IEC Standard 61967 / T. Ostermann, B. Deutschmann 132

Delay Testing

On Path Selection for Delay Fault Testing Considering Operating Conditions / B. Seshadri, I. Pomeranz, S. Reddy, S. Kundu 141

Requirements for Delay Testing of Look-Up Tables in SRAM-Based FPGAs / P. Girard, O. Heron, S. Pravossoudovitch, M. Renovell 147

Exploiting 1149.1 for Debug and Core Test

Debug Architecture for System on Chip Taking Full Advantage of the Test Access Port / E. Moerman, S. Bocq, J. Verfaillie 155.

Notes:

"IEEE Computer Society Order Number PR01908"--T.p. verso.

Includes bibliographical references and author index.

ISBN:

0769519083

9780769519081

OCLC:

53053282

Access Restriction:

Restricted for use by site license.