System-on-chip for real-time applications. proceedings : the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications : June 30 to July 2, 2003, Calgary Alberta, Canada / co-sponsored by IEEE Circuits and Systems Society ... [and others] ; edited by Wael Badawy, Yehya Ismail.

Format:

Book

Conference/Event

Contributor:

Badawy, Wael.

Ismail, Yehea I., 1971-

IEEE Xplore (Online service)

IEEE Circuits and Systems Society.

Conference Name:

IEEE International Workshop on System-on-Chip for Real-Time Applications (3rd : 2003 : Calgary, Alta.)

Language:

English

Subjects (All):

Application-specific integrated circuits--Design and construction--Congresses.

Application-specific integrated circuits.

Application-specific integrated circuits--Design and construction.

Systems on a chip--Congresses.

Systems on a chip.

Genre:

Conference papers and proceedings.

Physical Description:

xii, 408 pages : illustrations

Place of Publication:

Los Alamitos, Calif. : IEEE Computer Society, [2003]

System Details:

Mode of access: World Wide Web.

text file

Contents:

SoC Design Methodologies 1 / Chair: Yehia Massoud

Template Generation and Selection Algorithms / Y. Guo, G. Smit, H. Broersma, P. Heysters 2

Optimized Datapath Design by Evolutionary Computation / S. Araujo, A. Mesquita, C. Pedroza 6

A Performance Evaluation Method for Optimizing Embedded Applications / M. Grunewald, J. Niemann, U. Ruckert 10

A Robust Handshake for Asynchronous System / K. Cheng, W. Chang, C. Tu 16

SoC Physical Design

Invited / Chair: Laleh Behjat

Detailed Placement with Net Length Constraints / B. Halpin, H. Sehgal, C. Chen 22

Steiner Tree Construction Based on Congestion for the Global Routing Problem / L. Behjat, A. Vannelli 28

Interconnection Modelling Using Distributed RLC Models / D. Kucar, A. Vannelli 32

Low Power SoCs / Chair: Mohamed Khella

Energy Optimization in a HW/SW Tool: Design of Low Power Architecture System / P. Guitton-Ouhamou, C. Belleudy, M. Auguin 38

Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design / K. Vivekanandarajah, T. Srikanthan, S. Bhattacharya, P. Kannan 44

A Survey of Dynamic Power Optimization Techniques / L. Weng, X. Wang, B. Liu 48

The Design of Low-Power Fixed-Point FIR Differentiator IP Blocks / T. Fox, A. Carreira, L. Turner 53

Arithmetic Techniques / Chair: Vessel Dimitrov

IP Watermarking Techniques: Survey and Comparison / A. Abdel-Hamid, S. Tahar, E. Aboulhamid 60

The Application of 2D Algebraic Integer Encoding to a DCT IP Core / M. Fu, G. Jullien, V. Dimitrov, M. Ahmadi, W. Miller 66

Transformations of Signed-Binary Number Representations for Efficient VLSI Arithmetic / B. Andreev, E. Titlebaum, E. Friedman 70

Digital Realization of Analogue Computing Elements Using Bit Streams / N. Patel, G. Coghill, S. Nguang 76

Analog and Mixed Signals 1 / Chair: Ashraf Salem

A High Performance Wide-Band CMOS Transimpedance Amplifier for Optical Transceivers / S. Hasan 82

A Design of CMOS Broadband Amplifier with High-Q Active Inductor / J. Yang, Y. Cheng, C. Lee 86

A Mixed-Mode Delay-Locked Loop for Wide-Range Operation and Multiphase Clock Generation / K. Cheng, Y. Lo, W. Yu, S. Hung 90

A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a / S. Yu, R. Liu, W. Chen 94

A Low-Power Fully Differential 2.4-GHz Prescaler in 0.18[mu] CMOS Technology / S. Machan 98

Reconfigurable Hardware / Chair: Laurence Turner

Dynamic Hardware-Software Partitioning on Reconfigurable System-on-Chip / P. Waldeck, N. Bergmann 102

Hardware Partitioning Software for Dynamically Reconfigurable SoC Design / P. Brunet, C. Tanougast, Y. Berviller, S. Weber 106

A Catalog of Hardware Acceleration Techniques for Real-Time Reconfigurable System on Chip / N. Bergmann, P. Waldeck, J. Williams 112

Application Specific Coarse-Grained FPGA for Processing Element in Real-Time Parallel Particle Filters / M. Sadasivam, S. Hong 116

Reconfigurable Digital Instrumentation Based on FPGA / C. Giaconia, A. Di Stefano, G. Capponi 120

Introducing an FPGA Based Genetic Algorithms in the Applications of Blind Signals Separation / H. Emam, M. Ashour, H. Fekry, A. Wahdan 123

Digital Circuits / Chair: Radu Secareanu

A High Speech Multi-Input Comparator with Clocking-Charge Based for Low-Power Systems / S. Hsia 130

Area Efficient Implementation of Noise Generation System / D. Kim, M. An, H. Chung 134

High-Performance Crossbar Design for System-On-Chip / P. Wijetunga 138

Interfacing in Microprocessor-Based Systems with a Fast Physical Addressing / M. Maamoun, A. Benbelkacem, D. Berkani, A. Guessoum 144

SoC Applications 1 / Chair: Michael Weeks

A Speech Speed Control Using Fourier Composite Approach / H. Saito, S. Nakamura, M. Yoneyama 152

Feasibility of Fixed-Point Transversal Adaptive Filters in FPGA Devices with Embedded DSP Blocks / A. Lin, K. Gugel, J. Principe 157

Low-Power FFT/IFFT VLSI Macro Cell for Scalable Broadband VDSL Modem / S. Saponara, L. Serafini, L. Fanucci 161

VLSI Implementation of Very Low-Power Motion Estimator for Scaleable Coding Systems / S. Hsia 167

Modeling Issues in SoCs / Chair: Ashraf Salem

A CMOS Inverter TIA Modeling with VHDL-AMS / M. Karray, P. Desgreys, J. Charlot 172

High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim / A. Armaroli, M. Coppola, M. Nava, L. Fanucci 175

Java Based Co-Verification of Expedited Mobile Device Collaboration Using Observability / S. Aly, A. Salem 181

Multi-Models Adaptive Controller for Multivariable Systems / K. Rashid 185.

Notes:

Includes bibliographical references and author index.

ISBN:

076951944X

9780769519449

OCLC:

52633925

Access Restriction:

Restricted for use by site license.