ASYNC 2002. Eighth International Symposium on Asynchronous Circuits and Systems : proceedings : April 8-11, 2002, Manchester, UK / sponsored by IEEE Computer Society Technical Committee on VLSI ; with generous support from European Commission (IST-1999-29119 ACID-WG) ... [and others].

Format:

Book

Conference/Event

Contributor:

IEEE Xplore (Online service)

IEEE Computer Society. Technical Committee on VLSI.

European Commission.

Conference Name:

International Symposium on Advanced Research in Asynchronous Circuits and Systems (8th : 2002 : Manchester, England)

Language:

English

Subjects (All):

Asynchronous circuits--Congresses.

Asynchronous circuits.

Computers, Pipeline--Congresses.

Computers, Pipeline.

Embedded computer systems--Congresses.

Embedded computer systems.

Genre:

Conference papers and proceedings.

Physical Description:

xi, 219 pages : illustrations

Other Title:

Advanced research in asynchronous circuits and systems

International Symposium on Asynchronous Circuits and Systems

Asynchronous circuits and systems

Asynchronous Circuits and Systems, 2002, proceedings, Eighth International Symposium on.

Place of Publication:

Los Alamitos, Calif. : IEEE Computer Society Press, [2002]

System Details:

Mode of access: World Wide Web.

text file

Contents:

Paper Session 1 High-Speed and Energy-Efficient Pipelines / Chair: Jim Garside

Synchronous Interlocked Pipelines / H.M. Jacobson, P.N. Kudva, P. Bose, P.W. Cook, S.E. Schuster, E.G. Mercer, C.J. Myers 3

High-Speed QDI Asynchronous Pipelines / R. Ozdag, P.A. Beerel 13

Energy-Efficient Pipelines / J. Teifel, D. Fang, D. Biermann, C. Kelly, R. Manohar 23

Paper Session 2 Novel Self-Timed Circuit Experiments / Chair: Ivan Sutherland

A Negative-Overhead, Self-Timed Pipeline / B.D. Winters, M.R. Greenstreet 37

An Event Spacing Experiment / A.J. Winstanley, A. Garivier, M.R. Greenstreet 47

How the ARM Architecture Moved from a Start-Up Idea in Acorn Computers to Become a Global Standard / Robin Saxby

Paper Session 3 Mixed Synchronous/Asynchronous Communication and Design / Chair: TBD

Clock Synchronization through Handshake Signalling / J. Kessels, A. Peeters, P. Wielage, S-J. Kim 59

Point to Point GALS Interconnect / S. Moore, G. Taylor, R. Mullins, P. Robinson 69

A Dual-Mode Synchronous/Asynchronous CORDIC Processor / E. Grass, B. Sarker, K. Maharatna 76

An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz / M. Singh, J.A. Tierno, A. Rylyakov, S. Rylov, S.M. Nowick 84

Nanomagnetic Logic Devices / Russell Cowburn

Paper Session 4 Timing Analysis and Verification / Chair: Mark Josephs

Probabilistic Timing Analysis of Asynchronous Systems with Moments of Delays / S. Chakraborty, R. Angrish 99

Generation and Verification of Timing Constraints for Fine-Grain Pipelined Asynchronous Data-Path Circuits / M. Ozcan, M. Imai, T. Nanya 109

Relative Timing Based Verification of Timed Circuits and Systems / H. Kim, P.A. Beerel, K. Stevens 115

Paper Session 5 High-Level Design and Analysis of Self-Timed Circuits / Chair: Luciano Lavagno

Asynchronous Circuit Synthesis by Direct Mapping: Interfacing to Environment / A. Bystrov, A. Yakovlev 127

Design and Performance Analysis of Buffers: A Constructive Approach / R.H. Mak 137

Checking Delay-Insensitivity: 10[superscript 4] Gates and Beyond / A. Kondratyev, L. Neukom, O. Roig, A. Taubin, K. Fant 149

Mobile Applications / Nick Foggin

Paper Session 6 Production Testing / Chair: Marly Roncken

Adding Synchronous and LSSD Modes to Asynchronous Circuits / K. van Berkel, A. Peeters, F. te Beest 161

Testing of Asynchronous Designs by "Inappropriate" Means: Synchronous Approach / A. Kondratyev, L. Sorensen, A. Streich 171

A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems / F. Gurkaynak, T. Villiger, S. Oetiker, N. Felber, H. Kaeslin, W. Fichtner 181

On-Chip Structures for Timing Measurements and Test / D.J. Kinniment, O.V. Maevsky, A. Bystrov, G. Russell, A.V. Yakovlev 190

Paper Session 7 Security / Chair: Joep Kessels

SPA

A Synthesisable Amulet Core for Smartcard Applications / L.A. Plana, P.A. Riocreux, W.J. Bainbridge, A. Bardsley, J.D. Garside, S. Temple 201

Improving Smart Card Security Using Self-Timed Circuits / S. Moore, R. Anderson, P. Cunningham, R. Mullins, G. Taylor 211

Taking Asynchronous Design to the Market / Andrew Lines, Uri Cummings.

Notes:

"IEEE Computer Society Order Number PR01540"--T.p. verso.

Includes bibliographical references and author index.

ISBN:

0769515401

9780769515403

OCLC:

49600907

Access Restriction:

Restricted for use by site license.