Proceedings. 5th Australasian Computer Architecture Conference, ACAC 2000, 31 January-3 February 2000, Canberra, Australia / edited by Gernot Heiser ; sponsored by The Australian National University ... [and others].

Format:

Book

Conference/Event

Contributor:

Heiser, Gernot, 1957-

IEEE Xplore (Online service)

Australian National University.

Conference Name:

Australasian Computer Architecture Conference (5th : 2000 : Canberra, A.C.T.)

Series:

Australian computer science communications ; vol. 22, no. 4.

Australian computer science communications ; vol. 22, no. 4

Language:

English

Subjects (All):

Computer architecture--Congresses.

Computer architecture.

Genre:

Conference papers and proceedings.

Physical Description:

vii, 105 pages : illustrations.

Other Title:

5th Australasian Computer Architecture Conference

ACAC 2000

Computer architecture 2000

Computer Architecture Conference, 2000, ACAC 2000, 5th Australasian.

Place of Publication:

Los Alamitos, Calif. : IEEE Computer Society, [1999]

System Details:

Mode of access: World Wide Web.

text file

Contents:

Parallel Architecture for the Implementation of the Embedded Zerotree Wavelet Algorithm / H. Cheung, L-M. Ang, K. Eshraghian 3

Cost/Performance Tradeoff of n-Select Square Root Implementations / W. Chu, Y. Li 9

On the Feasibility of Fixed-Length Block Structured Architectures / L. Eeckhout, K. De Bosschere, H. Neefs 17

The Circuit Object Organization Library / B. Gunther 26

Micro-Threading: A New Approach to Future RISC / C. Jesshope, B. Luo 34

Dataflow Java: Implicitly Parallel Java / G. Lee, J. Morris 42

The Architecture of an FPGA-style Programmable Fuzzy Logic Controller Chip / T. Lund, A. Torralba, R. Carvajal 51

Adaptive Middleware for Heterogeneous Defense Networks

An Exploratory Simulation Study / B. McClure, J. Indulska, T. Au 57

A Scalable Re-Configurable Processor / J. Morris, G. Bundell, S. Tham 64

Automated Component Adaptation by Forced Simulation / P. Roop, A. Sowmya, S. Ramesh 74

Reconfigurable Computing Based on Universal Configurable Blocks

A New Approach for Supporting Performance- and Realtime-Dominated Applications / C. Siemers, S. Siemers 82

Static Scheduling for Out-of-Order Instruction Issue Processors / D. Tate, G. Steven, F. Steven 90

Fast Address-Space Switching on the StrongARM SA-1100 Processor / A. Wiggins, G. Heiser 97.

Notes:

"Revised 9 November 1999"--P. facing p. [3] of cover.

"IEEE Computer Society Order Number PR00512 ... IEEE Order Plan Catalog Number PR00512"--T.p. verso.

Includes bibliographical references and index.

ISBN:

0769505120

9780769505121

0769505147

9780769505145

OCLC:

43729375

Access Restriction:

Restricted for use by site license.