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Euro-DAC '95, European Design Automation Conference with Euro-VHDL. proceedings, Brighton, Great Britain, September 18-22, 1995 / sponsored by Gesellschaft für Informatik e.V... [and others].
- Format:
- Book
- Conference/Event
- Conference Name:
- European Design Automation Conference (1995 : Brighton, England)
- Series:
- ACM Digital Library (Series)
- Language:
- English
- Subjects (All):
- Electronic digital computers--Circuits--Design--Congresses.
- Electronic digital computers.
- Electronic circuit design--Data processing--Congresses.
- Electronic circuit design.
- Electronic circuit design--Data processing.
- Computer-aided design--Congresses.
- Computer-aided design.
- VHDL (Computer hardware description language)--Congresses.
- VHDL (Computer hardware description language).
- Electronic digital computers--Circuits--Design.
- Electronic digital computers--Circuits.
- Genre:
- Conference papers and proceedings.
- Physical Description:
- xxviii, 608 pages : illustrations
- Other Title:
- European Design Automation Conference with Euro-VHDL
- 1995 European Design Automation Conference
- At head of title: Proceedings, EURO-DAC '95
- Proceedings of European Design Automation Conference with EURO-VHDL '95 on EURO-DAC '95 with EURO-VHDL '95.
- Design Automation Conference, 1995, with EURO-VHDL, Proceedings EURO-DAC '95, European.
- Place of Publication:
- Los Alamitos, Calif. : IEEE Computer Society Press, [1995]
- System Details:
- Mode of access: World Wide Web.
- text file
- Contents:
- Session D-01: System level synthesis
- Session D-02: Information modeling
- Session D-03: Timing issues in synthesis
- Session D-04: Placement and routing
- Session D-05: Different aspects of testability improvements
- Session D-06: Architectural synthesis
- Session D-07: Partitioning and floorplanning
- Session D-08: Simulation and partitioning of hardware/software systems
- Session D-09: Fault modeling and delay testing
- Session D-11: Analog & timing modelling
- Session D-12: ATPG and speed-up techniques
- Session D-13: Simulation and debugging of system descriptions
- Session D-14: Logic synthesis and optimization
- Session D-15: Framework architectures
- Session D-16: Hardware/software system design
- Session D-17: EMC and thermal effects
- Session D-18: New ideas in synthesis
- Session V-01: Simulation
- Session V-02: Formal methods
- Session V-03: Language development
- Session V-04: Behavioral synthesis from VHDL
- Session V-05: Design techniques
- Session V-07: System level design
- Session V-08: Modeling
- Session V-09: Verification and validation
- User plenary session.
- Notes:
- "IEEE catalog number 95CB35850"--T.p. verso.
- Includes bibliographical references and index.
- ISBN:
- 0818671564
- 9780818671562
- 0780330803
- 9780780330801
- 0780330811
- 9780780330818
- OCLC:
- 34284996
- Access Restriction:
- Restricted for use by site license.
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