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Effective functional verification : principles and processes / by Srivatsa Vasudevan.
LIBRA TK7874.58 .V37 2006
Available from offsite location
- Format:
- Book
- Author/Creator:
- Vasudevan, Srivatsa.
- Language:
- English
- Subjects (All):
- Integrated circuits--Verification.
- Integrated circuits.
- Physical Description:
- xxiv, 256 pages : illustrations ; 25 cm
- Place of Publication:
- Dordrecht : Springer, 2006.
- Summary:
- Effective Functional Verification is organized into 4 parts. The first part contains 3 chapters designed appeal to newcomers and experienced people to the field. There is a survey of various verification methodologies and a discussion of them.
- The second part with 3 chapters is targeted towards people in management and higher up on the experience ladders. New verification engineers reading these chapters learn what is expected and how things work in verification. Some case studies are also presented with analysis of proposed improvements.
- The last two parts are the result of experience of several years. It goes into how to optimize a verification plan and an environment and how to get results effectively. Various subjects are discussed here to get the most out of a verification environment. Lastely, the appendix discusses some tool specifics to help remove repetitive work and also some tool specific guidelines.
- While reading Effective Functional Verification, one will be able to get a jump start on planning and executing a verification plan using the concepts presented.
- Contents:
- Part I Starting the Verification Journey
- 1 An Introduction to IC Verification 3
- Importance of Verification 3
- Overview of a Typical ASIC Design Process 6
- Factors in Successful Verification 11
- 2 Approaches to Verification 13
- What is Functional Verification all About? 14
- Stimulating the design - A choice of approaches 16
- Black Box Approach 16
- White Box Approach 18
- Gray Box Approach 18
- Verification Approaches Based on Integration 19
- Block Level Verification 20
- Sub System Verification 23
- Full Chip Verification 25
- System Level Verification 26
- Instruction Driven Verification 26
- Random Testing 29
- Coverage Driven Verification 30
- Transaction Based Verification 33
- Golden Model Approach 37
- Advantages of a Golden Model 37
- Disadvantages of using a Golden Model 38
- Pre-Post Processing Approach 39
- Assertion Based Verification 42
- Assertions - Who writes them and when? 44
- Types of Assertions 45
- Advantages of an Assertion Based Methodology 45
- Challenges with an Assertion Based Methodology 48
- Formal Verification 49
- Model Checking 51
- A Comparison of Simulation and Formal approaches 52
- Emulation and Acceleration 54
- 3 Various Workflows Practiced in Verification 59
- An Overview of the Entire Verification Process 59
- The Planning Process 62
- Some Other Aspects of Verification Planning 63
- Verification Resource Planning 64
- The Regression Process 65
- Block Regressions 67
- Chip Level Regressions 68
- Coverage in Regressions 68
- Maturing of the Design 69
- The Periodic Review Process 70
- Regression Result Reviews 71
- The Verification Signoff Process 72
- Part II Ingredients of Successful Verification
- 4 People make all the Difference 77
- Team Dynamics and Team Habits for Success 78
- Habit 1 Begin With the Big Picture in Mind 78
- Habit 2 Do it Right the First Time 80
- Habit 3 Be Object Oriented in your Approach 82
- Habit 4 Reduce, Reuse and Recycle 82
- Habit 5 Innovate 83
- Habit 6 Communicate 84
- The Six Qualities of Successful Verification Engineers 86
- Quality 1 The Ability to see the Full Picture 87
- Quality 2 Assumes Nothing 88
- Quality 3 Consistent 88
- Quality 4 Organized 89
- Quality 5 Multi-skilled 89
- Quality 6 Empower Others 90
- 5 Case Studies from the Real World 93
- Block and System Level Tests use Unrelated Environments 94
- Not Implementing Monitors and Assertions Early on 94
- Review Processes Not Done Timely 95
- Pure Random Testing Without Directed Tests 96
- Not Running a Smoke Test Before a Regression 97
- Lint Policies 98
- Effective Use of a Source Control Strategy 98
- 6 Tracking Results That Matter 101
- Why Do We Ever Need any Verification Metrics? 101
- Metrics in a Regression 102
- Commonly used Metrics 105
- Functional Coverage Metrics 109
- Structural Coverage Metrics 110
- Some Caveats on Structural Coverage 111
- Assertion Verification Metrics 111
- Part III Reducing work in Verification
- 7 Reducing Work in Verification 117
- Considerations in a Verification Environment 118
- Tri-State Buses and Dealing with Them 119
- Dealing with Internal Signals 120
- Environmental Considerations 122
- Dealing with Register Programming 128
- A Hybrid Approach to Register Programming 131
- Dealing with Clocks 136
- Driving the Design 137
- Debugging the Design 138
- Making Note of Errors 141
- Debug Levels 141
- Code Profiling to Keep the Inefficiency Out 143
- Regression Management 145
- Identify Failures Before You Run Again 149
- Don't Postpone Features to be Tested 149
- Compile your Code 149
- QC Processes to run a Clean Run 150
- Using a Data Profile to Speed up Simulations 150
- Getting the Machine to Document for You 154
- Keeping an Eye on the Design - Monitors 158
- Checkers in an Environment 160
- Linting Code 162
- The RTL Acceptance Criterion 163
- Part IV Ten Steps to Success
- 8 Ten Steps to Success 167
- Step 1 A Specification Review 173
- Step 2 The Identification of Test Objects 176
- Step 3 Review of the Test Object List 180
- Step 4 Tagging the List of Test Objects 182
- Using Tags to Simplify the Regression Process 183
- Step 5 Test Case Identification 185
- Structure of a Test Case 185
- Test Case Classifications 188
- Directed Tests 188
- Sweep Test Cases 190
- Negative Testing 192
- Random Test Cases 193
- The Creation of a Possible List of Test Cases 194
- Partitioning of Tests between Block and Top Level 197
- Step 6 The Definition of a Correctness Strategy 200
- Data Checkers 200
- Protocol Checkers 201
- Interface Checkers 201
- Cycle Accurate Checkers 203
- Using Monitors 203
- Using Assertions and Formal Verification in the Methodology 203
- Step 7 The test strategy 206
- Hierarchical Strategy 208
- Reuse Strategy 210
- Stimulus Strategy 210
- Test Case Strategy 211
- Identifying Test cases for Maximum Yield & Coverage 211
- Step 8 Testing the design 215
- Component identification 215
- Getting the Job Done. Execution of the test plan 221
- Getting a Helping Hand from External Resources 222
- The Case for GATE Simulations 223
- Step 9 Figuring out where you Are in the Process 226
- Performing Hole Analysis of What got Left Out in the Test Plan 231
- The (bi)Weekly Review Processes 232
- The monthly Review Processes 237
- Step 10 Correlations on completion to sign-off 238
- A Using PERL to connect to Microsoft Excel and Access 245
- B Using PERL to convert between UNIX text files and Microsoft Word 249.
- Notes:
- Includes bibliographical references and index.
- ISBN:
- 0387286012
- OCLC:
- 70268008
- Publisher Number:
- 9780387286013
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