CMOS integrated analog-to-digital and digital-to-analog converters / by Rudy van de Plassche.

Format:

Book

Author/Creator:

Plassche, Rudy J. van de.

Contributor:

Class of 1924 Book Fund.

Series:

Kluwer international series in engineering and computer science. Analog circuits and signal processing

Kluwer international series in engineering and computer science ; SECS 742.

Kluwer international series in engineering and computer science. Analog circuits and signal processing ; SECS 742

Language:

English

Subjects (All):

Analog-to-digital converters.

Digital-to-analog converters.

Integrated circuits.

Metal oxide semiconductors, Complementary.

Physical Description:

xlii, 588 pages : illustrations ; 25 cm.

Edition:

Second edition.

Place of Publication:

Boston : Kluwer Academic Publishers, [2003]

Summary:

Analog-to-digital (A/D) and digital-to-analog (D/A) convertersprovide the link between the analog world of transducers and thedigital world of signal processing, computing, digital datacollection, data storage on magnetic material or optical disks anddata processing systems. Practical converters must use standarddigital CMOS technology without requiring special processing optionsor processing steps. Scaling of digital technology into the submicronrange results in a reduction of the supply voltage into the 1 V rangeand below. Designs in this field require special circuit techniques tosolve this problem. Examples and practical designs will be discussedin this book.

Contents:

1 The converter as a black box 1

1.2 Basic D/A and A/D converter function 2

1.3 Classification of signals 5

1.4 Quantization errors 7

1.5 Oversampling of converters 10

1.6 Quantization error spectra 12

1.7 Amplitude dependence of quantization components 16

1.8 Multiple signal distortion 17

1.9 Accurate dynamic range calculation 19

1.10 Sampling time uncertainty 21

1.11 Sampling clock time uncertainty 25

1.12 Conversion systems 27

1.13 Nyquist filtering in A/D converter systems 31

1.14 Combined analog and digital filter 32

1.15 Output filtering in D/A converter systems 34

1.16 Dynamic range and alias filter order 41

1.17 Analog filter designs 42

1.18 Minimum required stop band attenuation 45

2 Specifications of converters 51

2.2 Digital data coding 52

2.3 Digital coding schemes 53

2.4 Ideal and Non-ideal converters 55

2.5 DC specifications 57

2.6 Dynamic specifications 65

2.7 Figure of Merit 103

3 High-speed A/D converters 107

3.2 Design problems in high-speed converters 110

3.3 Internal converter coding schemes 112

3.4 Full-flash converters 115

3.5 Interpolation 118

3.6 Averaging 124

3.7 6-bit converter implementation 130

3.8 Discrete time flash converter 134

3.9 Gray code full flash converters 138

3.10 Circular code flash converters 142

3.11 Two-step flash converters 144

3.12 Sub ranging converter architecture 148

3.13 Pipeline converter architecture 160

3.14 Folding converter system 169

3.15 Time interleaved high-speed converters 195

3.16 Minimum supply voltage calculation 198

3.17 Reference ladder signal feedthrough 199

3.18 Bubble correction 200

3.19 Delay over interconnect lines 201

4 High-speed D/A converters 205

4.2 High-speed D/A converter architectures 205

4.3 Voltage weighting based architecture 208

4.4 High-speed segmented converter architecture 214

5 High-resolution A/D converters 237

5.2 Single slope A/D converter system 238

5.3 Dual-slope A/D converter system 240

5.4 Dual-ramp single-slope A/D converter system 241

5.5 Successive approximation converter system 244

5.6 Algorithmic A/D converter 254

5.7 Cyclic Redundant Signed Digit A/D converter 256

5.8 Self-calibrating capacitor A/D converter 260

6 High-resolution D/A converters 263

6.2 Pulse-width modulation D/A converters 264

6.3 Integrating D/A converters 266

6.4 Current weighting using ladder networks 270

6.5 Monotonic by design network systems 280

6.6 Self calibrating D/A converter system 287

6.7 Dynamic Element Matching 289

6.8 Current calibration principle 302

7 Sample-and-hold amplifiers 313

7.2 Basic sample-and-hold configuration 314

7.3 Generalized non-inverting configurations 335

7.4 Inverting sample-and-hold circuit 345

7.5 Operational range of simple sample-and-hold amplifiers 346

8 Noise-shaping D/A conversion 349

8.2 Digital oversampling filtering 350

8.4 Multi-bit largely oversampled noise-shaper 370

8.5 Stability analysis of noise-shapers 371

8.6 Practical noise-shaping D/A converters 391

8.7 Multi-bit noise-shaping D/A converter 403

9 Sigma-delta A/D conversion 417

9.2 General form of Sigma-delta A/D converters 418

9.3 General filter architectures 423

9.4 Discussion of basic converter architectures 432

9.5 Multi-stage sigma-delta converter (MASH) 437

9.6 Quantizer overload avoidance 438

9.7 Converter input circuitry 441

9.8 Practical 16-bit cascaded converter 445

9.9 Feed-forward A/D converter system 445

9.10 Nth-order sigma-delta architecture 451

9.11 Bandpass sigma-delta converters 454

9.12 Low-pass to band-pass transformation 454

9.13 Continuous time band-pass converter 458

9.14 Limited gain in loop filter 463

9.15 Idle pattern 463

9.16 Sigma-delta digital voltmeter 469

10 Voltage and current references 477

10.2 Gate-source voltage used as a reference 477

10.3 Basic band-gap reference voltage source 479

11 Limitations of comparators 485

11.1 Signal delay in limiting amplifiers 485

11.2 Definition of the delay problem 486

11.3 Delay calculation model 487

11.4 Variable delay calculation 489

11.5 Distortion calculation 495

11.6 Failure analysis of comparators 499

11.7 Current mode comparator circuit 504

11.8 Differential auto-zero comparator 506

11.9 Complementary comparator with latch 508

11.10 Low kick back comparator implementation 509

11.11 Input frequency decision moment variation 510

12 Technology and device matching 513

12.2 Technology road map 513

12.3 MOS matching models 514

12.4 Capacitor matching 520

12.5 Resistor matching 521

13 Testing of D/A and A/D converters 523

13.2 DC testing of D/A converters 523

13.3 Dynamic testing of D/A converters 526

13.4 DC testing of A/D converters 531

13.5 Dynamic testing of A/D converters 532

13.6 Bit Error Rate 535

13.7 Testing very high-speed A/D converters 536

13.8 Beat frequency test configuration 539

13.9 Code density DNL and INL measurement 540

13.10 Testing of sample-and-hold amplifiers 544

13.11 Cascading sample-and-hold amplifiers 548.

Notes:

Includes bibliographical references (pages 551-566) and index.

Local Notes:

Acquired for the Penn Libraries with assistance from the Class of 1924 Book Fund.

ISBN:

1402075006

OCLC:

52287048